diff options
| author | Gregory Herrero <gregory.herrero@intel.com> | 2015-01-09 13:38:52 +0100 |
|---|---|---|
| committer | Felipe Balbi <balbi@ti.com> | 2015-01-12 15:33:30 -0600 |
| commit | 0a176279db6817cf865ed4c685e4a414be8226fd (patch) | |
| tree | 7a7b9bc8b7ec3c8b3f5e4d28a0938d9e67af9a6d /drivers/usb/dwc2/core.h | |
| parent | cec87f1d2686057654e4565b8eaab4f539e9afca (diff) | |
usb: dwc2: gadget: configure fifos from device tree
As fifo size can vary between SOCs, add possibility to configure
them from device tree. Fifo sizes used by the legacy driver will
be used If they are not provided by the device tree.
Tested-by: Robert Baldyga <r.baldyga@samsung.com>
Acked-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Gregory Herrero <gregory.herrero@intel.com>
Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com>
Reviewed-by: Robert Baldyga <r.baldyga@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/dwc2/core.h')
| -rw-r--r-- | drivers/usb/dwc2/core.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h index 7a0309d760d8..df6a64f463e8 100644 --- a/drivers/usb/dwc2/core.h +++ b/drivers/usb/dwc2/core.h @@ -193,6 +193,13 @@ enum dwc2_lx_state { DWC2_L3, /* Off state */ }; +/* + * Gadget periodic tx fifo sizes as used by legacy driver + * EP0 is not included + */ +#define DWC2_G_P_LEGACY_TX_FIFO_SIZE {256, 256, 256, 256, 768, 768, 768, \ + 768, 0, 0, 0, 0, 0, 0, 0} + /** * struct dwc2_core_params - Parameters for configuring the core * @@ -564,6 +571,9 @@ struct dwc2_hw_params { * @last_rst: Time of last reset * @eps: The endpoints being supplied to the gadget framework * @g_using_dma: Indicate if dma usage is enabled + * @g_rx_fifo_sz: Contains rx fifo size value + * @g_np_g_tx_fifo_sz: Contains Non-Periodic tx fifo size value + * @g_tx_fifo_sz: Contains tx fifo size value per endpoints */ struct dwc2_hsotg { struct device *dev; @@ -699,6 +709,9 @@ struct dwc2_hsotg { struct s3c_hsotg_ep *eps_in[MAX_EPS_CHANNELS]; struct s3c_hsotg_ep *eps_out[MAX_EPS_CHANNELS]; u32 g_using_dma; + u32 g_rx_fifo_sz; + u32 g_np_g_tx_fifo_sz; + u32 g_tx_fifo_sz[MAX_EPS_CHANNELS]; #endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */ }; |