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authorPeter Chen <peter.chen@freescale.com>2011-11-03 14:13:12 +0800
committerJason Liu <r64343@freescale.com>2012-07-20 13:17:13 +0800
commitc04f384cc86d2b0d23395ed950d6effda312bd71 (patch)
tree6a038a8b57bbb0b8d11b42722cec595ef94adac2 /drivers/usb/host
parent3dc34bfa723c87cc7542f15d2ba665ad8dcb1e2d (diff)
ENGR00161314-2 mx6q usb-host: add hsic support
Device part Add HSIC run and HSIC phy's definition Signed-off-by: Peter Chen <peter.chen@freescale.com>
Diffstat (limited to 'drivers/usb/host')
-rwxr-xr-xdrivers/usb/host/Kconfig13
-rwxr-xr-xdrivers/usb/host/ehci-arc.c12
-rwxr-xr-xdrivers/usb/host/ehci-fsl.h1
3 files changed, 25 insertions, 1 deletions
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 11ee0f5cda5b..9e99765ee61c 100755
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -77,6 +77,17 @@ config USB_EHCI_ARC_OTG
---help---
Enable support for the USB OTG port in HS/FS Host mode.
+config USB_EHCI_ARC_HSIC
+ bool "Support HSIC Host controller for Freescale SoC"
+ depends on USB_EHCI_ARC && ARCH_MX6
+ default n
+ ---help---
+ Some Freescale processors have an HSIC featured controller,
+ which supports EHCI host mode.
+
+ Say "y" here to add support for this controller
+ to the EHCI HCD driver.
+
config USB_STATIC_IRAM
bool "Use IRAM for USB"
depends on USB_EHCI_ARC
@@ -507,7 +518,7 @@ config USB_SL811_HCD
help
The SL811HS is a single-port USB controller that supports either
host side or peripheral side roles. Enable this option if your
- board has this chip, and you want to use it as a host controller.
+ board has this chip, and you want to use it as a host controller.
If unsure, say N.
To compile this driver as a module, choose M here: the
diff --git a/drivers/usb/host/ehci-arc.c b/drivers/usb/host/ehci-arc.c
index c7e78396e6dc..9ab9531e0ab5 100755
--- a/drivers/usb/host/ehci-arc.c
+++ b/drivers/usb/host/ehci-arc.c
@@ -283,6 +283,14 @@ int usb_hcd_fsl_probe(const struct hc_driver *driver,
fsl_platform_set_ahb_burst(hcd);
ehci_testmode_init(hcd_to_ehci(hcd));
+ /*
+ * Only for HSIC host controller, let HSCI controller
+ * connect with device, call it after EHCI initialization
+ * finishes.
+ */
+ if (pdata->hsic_post_ops)
+ pdata->hsic_post_ops();
+
ehci = hcd_to_ehci(hcd);
pdata->pm_command = ehci->command;
return retval;
@@ -379,6 +387,10 @@ static void fsl_setup_phy(struct ehci_hcd *ehci,
case FSL_USB2_PHY_UTMI:
portsc |= PORT_PTS_UTMI;
break;
+ /* HSIC */
+ case FSL_USB2_PHY_HSIC:
+ portsc |= PORT_PTS_HSIC;
+ break;
case FSL_USB2_PHY_NONE:
break;
}
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index f4282a3d6aa2..137c5053ed35 100755
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -28,6 +28,7 @@
#define PORT_PTS_UTMI (0<<30)
#define PORT_PTS_ULPI (2<<30)
#define PORT_PTS_SERIAL (3<<30)
+#define PORT_PTS_HSIC (1<<25)
#define PORT_PTS_PTW (1<<28)
#define PORT_PTS_PHCD (1<<23)
#define FSL_SOC_USB_PORTSC2 0x188