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authorSuresh Mangipudi <smangipudi@nvidia.com>2011-08-17 11:19:37 +0530
committerVarun Colbert <vcolbert@nvidia.com>2011-08-18 16:40:41 -0700
commit6dfe92801cf0d4ff34068abeac79413f65ecc70a (patch)
treed5c16f6444d5681a50caa7f6ca24a953cf97b68f /drivers/usb
parent53ccd798bc1172b7021c8929ca7ebc39244ade09 (diff)
usb: ehci: tegra: Add SE0 delay for 2LS bit time
Make sure SE0 is driven for 2LS bit time end of resume, so that host does not see any false disconnect. Bug 860452 Change-Id: I2651e3977acb068b66284b15d168808e1ccd0277 Reviewed-on: http://git-master/r/47464 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
Diffstat (limited to 'drivers/usb')
-rw-r--r--drivers/usb/host/ehci-tegra.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 8be5535cf392..5cc6124a0d92 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -191,6 +191,10 @@ static int tegra_ehci_hub_control(
clear_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
ehci->reset_done[wIndex-1] = 0;
tegra_usb_phy_postresume(tegra->phy, false);
+#ifndef CONFIG_ARCH_TEGRA_2x_SOC
+ ehci->command |= CMD_RUN;
+ ehci_writel(ehci, ehci->command, &ehci->regs->command);
+#endif
}
} else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
temp = ehci_readl(ehci, status_reg);
@@ -239,7 +243,7 @@ static int tegra_ehci_hub_control(
/* Disable disconnect detection during port resume */
tegra_usb_phy_preresume(tegra->phy, false);
-
+#ifdef CONFIG_ARCH_TEGRA_2x_SOC
ehci_dbg(ehci, "%s:USBSTS = 0x%x", __func__,
ehci_readl(ehci, &ehci->regs->status));
usbsts_reg = ehci_readl(ehci, &ehci->regs->status);
@@ -260,6 +264,7 @@ static int tegra_ehci_hub_control(
pr_err("%s: timeout set STS_SRI\n", __func__);
udelay(20);
+#endif
temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
/* start resume signaling */
ehci_writel(ehci, temp | PORT_RESUME, status_reg);
@@ -399,6 +404,10 @@ static int tegra_usb_suspend(struct usb_hcd *hcd, bool is_dpd)
else
tegra->port_speed = (readl(&hw->port_status[0]) >> 26) & 0x3;
ehci_halt(tegra->ehci);
+#ifndef CONFIG_ARCH_TEGRA_2x_SOC
+ tegra->ehci->command = ehci_readl(tegra->ehci,
+ &tegra->ehci->regs->command);
+#endif
spin_unlock_irqrestore(&tegra->ehci->lock, flags);