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authorJingoo Han <jg1.han@samsung.com>2012-07-17 17:44:13 +0900
committerFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>2012-07-24 20:55:16 +0000
commit1f61ce508a2e88d19045aa77f90f366251419529 (patch)
tree125998f4928d3e3db463b4e04b6f70bc33cee607 /drivers/video/exynos
parent559dc9d9fed3578cdb82772e4638069fe8176f2f (diff)
video: exynos_dp: check the only INTERLANE_ALIGN_DONE bit during Link Training
The only INTERLANE_ALIGN_DONE bit should be checked for channel equalization during Link Training. Previously, the other bits such as LINK_STATUS_UPDATED were checked, and channel equalization procedure was repeated unnecessarily. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Diffstat (limited to 'drivers/video/exynos')
-rw-r--r--drivers/video/exynos/exynos_dp_core.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/video/exynos/exynos_dp_core.c b/drivers/video/exynos/exynos_dp_core.c
index bf55e5192f9b..0f3a64baecc9 100644
--- a/drivers/video/exynos/exynos_dp_core.c
+++ b/drivers/video/exynos/exynos_dp_core.c
@@ -336,7 +336,7 @@ static int exynos_dp_channel_eq_ok(u8 link_status[6], int lane_count)
u8 lane_status;
lane_align = link_status[2];
- if ((lane_align == DPCD_INTERLANE_ALIGN_DONE) == 0)
+ if ((lane_align & DPCD_INTERLANE_ALIGN_DONE) == 0)
return -EINVAL;
for (lane = 0; lane < lane_count; lane++) {