diff options
| author | Liu Ying <Ying.Liu@freescale.com> | 2015-09-14 13:26:29 +0800 |
|---|---|---|
| committer | Liu Ying <Ying.Liu@freescale.com> | 2015-09-18 18:04:01 +0800 |
| commit | d0126e42f46f6dad9ae8c6aa390b0e1bea76492e (patch) | |
| tree | 4a2d1059c8ab05d1d0f402be9dd19831d0a2dbc2 /drivers/video/mxc | |
| parent | 7d1bde2d60e6c2f535adac98887aaa221998f0cc (diff) | |
MLK-11536 video: mxc ipuv3 fb: Fix pan-disp frame drop issue when PRE is enabled
There could be frame drop issue when we do pan display if we update PRE next
buffer address before waiting for the flip completion, because we may hold
the flip completion already and then two continuous pan display operations may
happen quickly within one active period of frame scanning - the first PRE next
buffer address is overriden. To fix this issue, this patch updates the buffer
address after the flip completion.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Diffstat (limited to 'drivers/video/mxc')
| -rw-r--r-- | drivers/video/mxc/mxc_ipuv3_fb.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/video/mxc/mxc_ipuv3_fb.c b/drivers/video/mxc/mxc_ipuv3_fb.c index a72450c16c4c..d45b414126a6 100644 --- a/drivers/video/mxc/mxc_ipuv3_fb.c +++ b/drivers/video/mxc/mxc_ipuv3_fb.c @@ -2306,6 +2306,7 @@ mxcfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) u_int y_bottom; unsigned int fr_xoff, fr_yoff, fr_w, fr_h; unsigned int x_crop = 0, y_crop = 0; + unsigned int sec_buf_off = 0, trd_buf_off = 0; unsigned long base, ipu_base = 0, active_alpha_phy_addr = 0; bool loc_alpha_en = false; int fb_stride; @@ -2393,7 +2394,6 @@ mxcfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) } if (mxc_fbi->cur_prefetch) { - unsigned int sec_buf_off = 0, trd_buf_off = 0; ipu_get_channel_offset(fbi_to_pixfmt(info, true), info->var.xres, fr_h, @@ -2405,9 +2405,6 @@ mxcfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) &trd_buf_off); if (mxc_fbi->resolve) sec_buf_off = mxc_fbi->gpu_sec_buf_off; - ipu_pre_set_fb_buffer(mxc_fbi->pre_num, base, - x_crop, y_crop, - sec_buf_off, trd_buf_off); } else { ipu_base = base; } @@ -2485,6 +2482,10 @@ next: ipu_select_buffer(mxc_fbi->ipu, mxc_fbi->ipu_ch, IPU_INPUT_BUFFER, mxc_fbi->cur_ipu_buf); + } else { + ipu_pre_set_fb_buffer(mxc_fbi->pre_num, base, + x_crop, y_crop, + sec_buf_off, trd_buf_off); } ipu_clear_irq(mxc_fbi->ipu, mxc_fbi->ipu_ch_irq); ipu_enable_irq(mxc_fbi->ipu, mxc_fbi->ipu_ch_irq); |