diff options
| author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-09-16 17:17:25 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-09-16 17:17:25 -0700 |
| commit | 6a2a2cdd57d11ee3117539b846a45df6efbd35b1 (patch) | |
| tree | b6ab218810666a75d6612bde4d4a224118c0834c /drivers/video/omap2/dss/sdi.c | |
| parent | 8e360ec82322358056786e651322085af3ef6960 (diff) | |
| parent | 5698bd757d55b1bb87edd1a9744ab09c142abfc2 (diff) | |
Merge 3.6-rc6 into staging-next
This pulls in the staging tree fixes in 3.6-rc6 into our branch to resolve the
merge issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/video/omap2/dss/sdi.c')
| -rw-r--r-- | drivers/video/omap2/dss/sdi.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/video/omap2/dss/sdi.c b/drivers/video/omap2/dss/sdi.c index 5d31699fbd3c..f43bfe17b3b6 100644 --- a/drivers/video/omap2/dss/sdi.c +++ b/drivers/video/omap2/dss/sdi.c @@ -105,6 +105,20 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev) sdi_config_lcd_manager(dssdev); + /* + * LCLK and PCLK divisors are located in shadow registers, and we + * normally write them to DISPC registers when enabling the output. + * However, SDI uses pck-free as source clock for its PLL, and pck-free + * is affected by the divisors. And as we need the PLL before enabling + * the output, we need to write the divisors early. + * + * It seems just writing to the DISPC register is enough, and we don't + * need to care about the shadow register mechanism for pck-free. The + * exact reason for this is unknown. + */ + dispc_mgr_set_clock_div(dssdev->manager->id, + &sdi.mgr_config.clock_info); + dss_sdi_init(dssdev->phy.sdi.datapairs); r = dss_sdi_enable(); if (r) |