video: tegra: Clean up nvhdcp from upstream merge

Change-Id: I8d396047e663995651c7e60253294d95c61e325b
Reviewed-on: http://git-master/r/21295
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

4 files changed, 48 insertions, 61 deletions

diff --git a/drivers/video/tegra/dc/Makefile b/drivers/video/tegra/dc/Makefile
index 7336f46111e0..8ab906465976 100644
--- a/drivers/video/tegra/dc/Makefile
+++ b/drivers/video/tegra/dc/Makefile
@@ -1,6 +1,6 @@
 obj-y += dc.o
 obj-y += rgb.o
 obj-y += hdmi.o
-obj-y += edid.o
 obj-y += nvhdcp.o
+obj-y += edid.o
 obj-$(CONFIG_TEGRA_OVERLAY) += overlay.o
diff --git a/drivers/video/tegra/dc/edid.c b/drivers/video/tegra/dc/edid.c
index de292e25f384..327ed63493e8 100644
--- a/drivers/video/tegra/dc/edid.c
+++ b/drivers/video/tegra/dc/edid.c
@@ -117,7 +117,7 @@ static void tegra_edid_dump(struct tegra_edid *edid)
 }
 #endif
 
-static int tegra_edid_read_block(struct tegra_edid *edid, int block, u8 *data)
+int tegra_edid_read_block(struct tegra_edid *edid, int block, u8 *data)
 {
 	u8 block_buf[] = {block >> 1};
 	u8 cmd_buf[] = {(block & 0x1) * 128};
diff --git a/drivers/video/tegra/dc/hdmi.c b/drivers/video/tegra/dc/hdmi.c
index f705d842a09c..7f2ccf6331b4 100644
--- a/drivers/video/tegra/dc/hdmi.c
+++ b/drivers/video/tegra/dc/hdmi.c
@@ -68,7 +68,7 @@ struct tegra_dc_hdmi_data {
 	bool				dvi;
 };
 
-static const struct fb_videomode tegra_dc_hdmi_supported_modes[] = {
+const struct fb_videomode tegra_dc_hdmi_supported_modes[] = {
 	/* 1280x720p 60hz: EIA/CEA-861-B Format 4 */
 	{
 		.xres =		1280,
@@ -243,13 +243,13 @@ static const struct tegra_hdmi_audio_config
 }
 
 
-static inline unsigned long _tegra_hdmi_readl(struct tegra_dc_hdmi_data *hdmi,
+unsigned long tegra_hdmi_readl(struct tegra_dc_hdmi_data *hdmi,
 					     unsigned long reg)
 {
 	return readl(hdmi->base + reg * 4);
 }
 
-static inline void _tegra_hdmi_writel(struct tegra_dc_hdmi_data *hdmi,
+void tegra_hdmi_writel(struct tegra_dc_hdmi_data *hdmi,
 				     unsigned long val, unsigned long reg)
 {
 	writel(val, hdmi->base + reg * 4);
@@ -259,15 +259,15 @@ static inline void tegra_hdmi_clrsetbits(struct tegra_dc_hdmi_data *hdmi,
 					 unsigned long reg, unsigned long clr,
 					 unsigned long set)
 {
-	unsigned long val = _tegra_hdmi_readl(hdmi, reg);
+	unsigned long val = tegra_hdmi_readl(hdmi, reg);
 	val &= ~clr;
 	val |= set;
-	_tegra_hdmi_writel(hdmi, val, reg);
+	tegra_hdmi_writel(hdmi, val, reg);
 }
 
 #define DUMP_REG(a) do {						\
 		printk("HDMI %-32s\t%03x\t%08lx\n",			\
-		       #a, a, _tegra_hdmi_readl(hdmi, a));		\
+		       #a, a, tegra_hdmi_readl(hdmi, a));		\
 	} while (0)
 
 #ifdef DEBUG
@@ -533,8 +533,7 @@ static irqreturn_t tegra_dc_hdmi_irq(int irq, void *ptr)
 	if (hdmi->suspended) {
 		hdmi->hpd_pending = true;
 	} else {
-		bool v = tegra_dc_hdmi_hpd(dc);
-		if (v)
+		if (tegra_dc_hdmi_hpd(dc))
 			schedule_delayed_work(&hdmi->work, msecs_to_jiffies(100));
 		else
 			schedule_delayed_work(&hdmi->work, msecs_to_jiffies(0));
@@ -752,7 +751,7 @@ static void tegra_dc_hdmi_setup_audio_fs_tables(struct tegra_dc *dc)
 			delta = 9;
 
 		eight_half = (8 * HDMI_AUDIOCLK_FREQ) / (f * 128);
-		_tegra_hdmi_writel(hdmi, AUDIO_FS_LOW(eight_half - delta) |
+		tegra_hdmi_writel(hdmi, AUDIO_FS_LOW(eight_half - delta) |
 				  AUDIO_FS_HIGH(eight_half + delta),
 				  HDMI_NV_PDISP_AUDIO_FS(i));
 	}
@@ -765,7 +764,7 @@ static int tegra_dc_hdmi_setup_audio(struct tegra_dc *dc)
 	unsigned long audio_n;
 	unsigned audio_freq = 44100; /* TODO: find some way of configuring this */
 
-	_tegra_hdmi_writel(hdmi,
+	tegra_hdmi_writel(hdmi,
 			  AUDIO_CNTRL0_ERROR_TOLERANCE(6) |
 			  AUDIO_CNTRL0_FRAMES_PER_BLOCK(0xc0) |
 			  AUDIO_CNTRL0_SOURCE_SELECT_AUTO,
@@ -779,24 +778,24 @@ static int tegra_dc_hdmi_setup_audio(struct tegra_dc *dc)
 		return -EINVAL;
 	}
 
-	_tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_HDMI_ACR_CTRL);
+	tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_HDMI_ACR_CTRL);
 
 	audio_n = AUDIO_N_RESETF | AUDIO_N_GENERATE_ALTERNALTE |
 		AUDIO_N_VALUE(config->n - 1);
-	_tegra_hdmi_writel(hdmi, audio_n, HDMI_NV_PDISP_AUDIO_N);
+	tegra_hdmi_writel(hdmi, audio_n, HDMI_NV_PDISP_AUDIO_N);
 
-	_tegra_hdmi_writel(hdmi, ACR_SUBPACK_N(config->n) | ACR_ENABLE,
+	tegra_hdmi_writel(hdmi, ACR_SUBPACK_N(config->n) | ACR_ENABLE,
 			  HDMI_NV_PDISP_HDMI_ACR_0441_SUBPACK_HIGH);
 
-	_tegra_hdmi_writel(hdmi, ACR_SUBPACK_CTS(config->cts),
+	tegra_hdmi_writel(hdmi, ACR_SUBPACK_CTS(config->cts),
 			  HDMI_NV_PDISP_HDMI_ACR_0441_SUBPACK_LOW);
 
-	_tegra_hdmi_writel(hdmi, SPARE_HW_CTS | SPARE_FORCE_SW_CTS |
+	tegra_hdmi_writel(hdmi, SPARE_HW_CTS | SPARE_FORCE_SW_CTS |
 			  SPARE_CTS_RESET_VAL(1),
 			  HDMI_NV_PDISP_HDMI_SPARE);
 
 	audio_n &= ~AUDIO_N_RESETF;
-	_tegra_hdmi_writel(hdmi, audio_n, HDMI_NV_PDISP_AUDIO_N);
+	tegra_hdmi_writel(hdmi, audio_n, HDMI_NV_PDISP_AUDIO_N);
 
 	tegra_dc_hdmi_setup_audio_fs_tables(dc);
 
@@ -817,7 +816,7 @@ static void tegra_dc_hdmi_write_infopack(struct tegra_dc *dc, int header_reg,
 		csum +=((u8 *)data)[i];
 	((u8 *)data)[0] = 0x100 - csum;
 
-	_tegra_hdmi_writel(hdmi, INFOFRAME_HEADER_TYPE(type) |
+	tegra_hdmi_writel(hdmi, INFOFRAME_HEADER_TYPE(type) |
 			  INFOFRAME_HEADER_VERSION(version) |
 			  INFOFRAME_HEADER_LEN(len - 1),
 			  header_reg);
@@ -844,8 +843,8 @@ static void tegra_dc_hdmi_write_infopack(struct tegra_dc *dc, int header_reg,
 		if (subpack_idx == 6 || (i + 1 == len)) {
 			int reg = header_reg + 1 + (i / 7) * 2;
 
-			_tegra_hdmi_writel(hdmi, subpack[0], reg);
-			_tegra_hdmi_writel(hdmi, subpack[1], reg + 1);
+			tegra_hdmi_writel(hdmi, subpack[0], reg);
+			tegra_hdmi_writel(hdmi, subpack[1], reg + 1);
 		}
 	}
 }
@@ -856,7 +855,7 @@ static void tegra_dc_hdmi_setup_avi_infoframe(struct tegra_dc *dc, bool dvi)
 	struct hdmi_avi_infoframe avi;
 
 	if (dvi) {
-		_tegra_hdmi_writel(hdmi, 0x0,
+		tegra_hdmi_writel(hdmi, 0x0,
 				  HDMI_NV_PDISP_HDMI_AVI_INFOFRAME_CTRL);
 		return;
 	}
@@ -912,7 +911,7 @@ static void tegra_dc_hdmi_setup_avi_infoframe(struct tegra_dc *dc, bool dvi)
 				     HDMI_AVI_VERSION,
 				     &avi, sizeof(avi));
 
-	_tegra_hdmi_writel(hdmi, INFOFRAME_CTRL_ENABLE,
+	tegra_hdmi_writel(hdmi, INFOFRAME_CTRL_ENABLE,
 			  HDMI_NV_PDISP_HDMI_AVI_INFOFRAME_CTRL);
 }
 
@@ -954,7 +953,7 @@ static void tegra_dc_hdmi_setup_audio_infoframe(struct tegra_dc *dc, bool dvi)
 	struct hdmi_audio_infoframe audio;
 
 	if (dvi) {
-		_tegra_hdmi_writel(hdmi, 0x0,
+		tegra_hdmi_writel(hdmi, 0x0,
 				  HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_CTRL);
 		return;
 	}
@@ -967,7 +966,7 @@ static void tegra_dc_hdmi_setup_audio_infoframe(struct tegra_dc *dc, bool dvi)
 				     HDMI_AUDIO_VERSION,
 				     &audio, sizeof(audio));
 
-	_tegra_hdmi_writel(hdmi, INFOFRAME_CTRL_ENABLE,
+	tegra_hdmi_writel(hdmi, INFOFRAME_CTRL_ENABLE,
 			  HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_CTRL);
 }
 
@@ -1023,13 +1022,13 @@ static void tegra_dc_hdmi_enable(struct tegra_dc *dc)
 	tegra_dc_writel(dc, PULSE_START(pulse_start) | PULSE_END(pulse_start + 8),
 		  DC_DISP_H_PULSE2_POSITION_A);
 
-	_tegra_hdmi_writel(hdmi,
+	tegra_hdmi_writel(hdmi,
 			  VSYNC_WINDOW_END(0x210) |
 			  VSYNC_WINDOW_START(0x200) |
 			  VSYNC_WINDOW_ENABLE,
 			  HDMI_NV_PDISP_HDMI_VSYNC_WINDOW);
 
-	_tegra_hdmi_writel(hdmi,
+	tegra_hdmi_writel(hdmi,
 			  (dc->ndev->id ? HDMI_SRC_DISPLAYB : HDMI_SRC_DISPLAYA) |
 			  ARM_VIDEO_RANGE_LIMITED,
 			  HDMI_NV_PDISP_INPUT_CONTROL);
@@ -1038,7 +1037,7 @@ static void tegra_dc_hdmi_enable(struct tegra_dc *dc)
 	clk_disable(hdmi->disp2_clk);
 
 	dispclk_div_8_2 = clk_get_rate(hdmi->clk) / 1000000 * 4;
-	_tegra_hdmi_writel(hdmi,
+	tegra_hdmi_writel(hdmi,
 			  SOR_REFCLK_DIV_INT(dispclk_div_8_2 >> 2) |
 			  SOR_REFCLK_DIV_FRAC(dispclk_div_8_2),
 			  HDMI_NV_PDISP_SOR_REFCLK);
@@ -1059,13 +1058,13 @@ static void tegra_dc_hdmi_enable(struct tegra_dc *dc)
 					rekey - 18) / 32);
 	if (!hdmi->dvi)
 		val |= HDMI_CTRL_ENABLE;
-	_tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_HDMI_CTRL);
+	tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_HDMI_CTRL);
 
 	if (hdmi->dvi)
-		_tegra_hdmi_writel(hdmi, 0x0,
+		tegra_hdmi_writel(hdmi, 0x0,
 				  HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
 	else
-		_tegra_hdmi_writel(hdmi, GENERIC_CTRL_AUDIO,
+		tegra_hdmi_writel(hdmi, GENERIC_CTRL_AUDIO,
 				  HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
 
 	tegra_dc_hdmi_setup_avi_infoframe(dc, hdmi->dvi);
@@ -1095,11 +1094,11 @@ static void tegra_dc_hdmi_enable(struct tegra_dc *dc)
 		pll0 |= SOR_PLL_ICHPMP(2);
 	}
 
-	_tegra_hdmi_writel(hdmi, pll0, HDMI_NV_PDISP_SOR_PLL0);
-	_tegra_hdmi_writel(hdmi, pll1, HDMI_NV_PDISP_SOR_PLL1);
+	tegra_hdmi_writel(hdmi, pll0, HDMI_NV_PDISP_SOR_PLL0);
+	tegra_hdmi_writel(hdmi, pll1, HDMI_NV_PDISP_SOR_PLL1);
 
 	if (pll1 & SOR_PLL_PE_EN) {
-		_tegra_hdmi_writel(hdmi,
+		tegra_hdmi_writel(hdmi,
 				  PE_CURRENT0(0xf) |
 				  PE_CURRENT1(0xf) |
 				  PE_CURRENT2(0xf) |
@@ -1113,7 +1112,7 @@ static void tegra_dc_hdmi_enable(struct tegra_dc *dc)
 	else
 		ds = DRIVE_CURRENT_5_250_mA;
 
-	_tegra_hdmi_writel(hdmi,
+	tegra_hdmi_writel(hdmi,
 			  DRIVE_CURRENT_LANE0(ds) |
 			  DRIVE_CURRENT_LANE1(ds) |
 			  DRIVE_CURRENT_LANE2(ds) |
@@ -1121,7 +1120,7 @@ static void tegra_dc_hdmi_enable(struct tegra_dc *dc)
 			  DRIVE_CURRENT_FUSE_OVERRIDE,
 			  HDMI_NV_PDISP_SOR_LANE_DRIVE_CURRENT);
 
-	_tegra_hdmi_writel(hdmi,
+	tegra_hdmi_writel(hdmi,
 			  SOR_SEQ_CTL_PU_PC(0) |
 			  SOR_SEQ_PU_PC_ALT(0) |
 			  SOR_SEQ_PD_PC(8) |
@@ -1135,13 +1134,13 @@ static void tegra_dc_hdmi_enable(struct tegra_dc *dc)
 		SOR_SEQ_INST_PIN_B_LOW |
 		SOR_SEQ_INST_DRIVE_PWM_OUT_LO;
 
-	_tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_SEQ_INST0);
-	_tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_SEQ_INST8);
+	tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_SEQ_INST0);
+	tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_SEQ_INST8);
 
 	val = 0x1c800;
 	val &= ~SOR_CSTM_ROTCLK(~0);
 	val |= SOR_CSTM_ROTCLK(2);
-	_tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_CSTM);
+	tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_CSTM);
 
 
 	tegra_dc_writel(dc, DISP_CTRL_MODE_STOP, DC_CMD_DISPLAY_COMMAND);
@@ -1150,13 +1149,13 @@ static void tegra_dc_hdmi_enable(struct tegra_dc *dc)
 
 
 	/* start SOR */
-	_tegra_hdmi_writel(hdmi,
+	tegra_hdmi_writel(hdmi,
 			  SOR_PWR_NORMAL_STATE_PU |
 			  SOR_PWR_NORMAL_START_NORMAL |
 			  SOR_PWR_SAFE_STATE_PD |
 			  SOR_PWR_SETTING_NEW_TRIGGER,
 			  HDMI_NV_PDISP_SOR_PWR);
-	_tegra_hdmi_writel(hdmi,
+	tegra_hdmi_writel(hdmi,
 			  SOR_PWR_NORMAL_STATE_PU |
 			  SOR_PWR_NORMAL_START_NORMAL |
 			  SOR_PWR_SAFE_STATE_PD |
@@ -1166,7 +1165,7 @@ static void tegra_dc_hdmi_enable(struct tegra_dc *dc)
 	retries = 1000;
 	do {
 		BUG_ON(--retries < 0);
-		val = _tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PWR);
+		val = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PWR);
 	} while (val & SOR_PWR_SETTING_NEW_PENDING);
 
 	val = SOR_STATE_ASY_CRCMODE_COMPLETE |
@@ -1185,16 +1184,16 @@ static void tegra_dc_hdmi_enable(struct tegra_dc *dc)
 	else
 		val |= SOR_STATE_ASY_VSYNCPOL_POS;
 
-	_tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_STATE2);
+	tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_STATE2);
 
 	val = SOR_STATE_ASY_HEAD_OPMODE_AWAKE | SOR_STATE_ASY_ORMODE_NORMAL;
-	_tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_STATE1);
+	tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_STATE1);
 
-	_tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_SOR_STATE0);
-	_tegra_hdmi_writel(hdmi, SOR_STATE_UPDATE, HDMI_NV_PDISP_SOR_STATE0);
-	_tegra_hdmi_writel(hdmi, val | SOR_STATE_ATTACHED,
+	tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_SOR_STATE0);
+	tegra_hdmi_writel(hdmi, SOR_STATE_UPDATE, HDMI_NV_PDISP_SOR_STATE0);
+	tegra_hdmi_writel(hdmi, val | SOR_STATE_ATTACHED,
 			  HDMI_NV_PDISP_SOR_STATE1);
-	_tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_SOR_STATE0);
+	tegra_hdmi_writel(hdmi, 0, HDMI_NV_PDISP_SOR_STATE0);
 
 	tegra_dc_writel(dc, HDMI_ENABLE, DC_DISP_DISP_WIN_OPTIONS);
 
@@ -1230,14 +1229,3 @@ struct tegra_dc_out_ops tegra_dc_hdmi_ops = {
 	.resume = tegra_dc_hdmi_resume,
 };
 
-unsigned long tegra_hdmi_readl(struct tegra_dc_hdmi_data *hdmi,
-					     unsigned long reg)
-{
-	return _tegra_hdmi_readl(hdmi, reg);
-}
-
-void tegra_hdmi_writel(struct tegra_dc_hdmi_data *hdmi,
-				     unsigned long val, unsigned long reg)
-{
-	_tegra_hdmi_writel(hdmi, val, reg);
-}
diff --git a/drivers/video/tegra/dc/hdmi.h b/drivers/video/tegra/dc/hdmi.h
index a280cbdcb720..f726f41f8dbc 100644
--- a/drivers/video/tegra/dc/hdmi.h
+++ b/drivers/video/tegra/dc/hdmi.h
@@ -216,6 +216,5 @@ unsigned long tegra_hdmi_readl(struct tegra_dc_hdmi_data *hdmi,
 				unsigned long reg);
 void tegra_hdmi_writel(struct tegra_dc_hdmi_data *hdmi,
 				unsigned long val, unsigned long reg);
-int tegra_hdmi_i2c(struct tegra_dc_hdmi_data *hdmi,
-				struct i2c_msg *msg, int msg_len);
+
 #endif