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authorErik Gilling <konkers@android.com>2011-02-02 15:28:32 -0800
committerErik Gilling <konkers@android.com>2011-02-02 18:36:55 -0800
commit29c4c67185ebab213ce0b54a9292250e0f45a180 (patch)
tree23dfe32ced25968b3e82477e890110fe21a589cf /drivers/video
parent29cf32156dbdbb36d89edffbbe1bbda44760f7ac (diff)
video: tegra: set h/v sync polarity for HDMI
Change-Id: I4be0eb963c3779b9313ef94476b1589059d4aa3c Signed-off-by: Erik Gilling <konkers@android.com>
Diffstat (limited to 'drivers/video')
-rw-r--r--drivers/video/tegra/dc/hdmi.c27
1 files changed, 17 insertions, 10 deletions
diff --git a/drivers/video/tegra/dc/hdmi.c b/drivers/video/tegra/dc/hdmi.c
index b3eb86220ab4..b214f2c41db3 100644
--- a/drivers/video/tegra/dc/hdmi.c
+++ b/drivers/video/tegra/dc/hdmi.c
@@ -1052,16 +1052,23 @@ static void tegra_dc_hdmi_enable(struct tegra_dc *dc)
val = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PWR);
} while (val & SOR_PWR_SETTING_NEW_PENDING);
- tegra_hdmi_writel(hdmi,
- SOR_STATE_ASY_CRCMODE_COMPLETE |
- SOR_STATE_ASY_OWNER_HEAD0 |
- SOR_STATE_ASY_SUBOWNER_BOTH |
- SOR_STATE_ASY_PROTOCOL_SINGLE_TMDS_A |
- /* TODO: to look at hsync polarity */
- SOR_STATE_ASY_HSYNCPOL_POS |
- SOR_STATE_ASY_VSYNCPOL_POS |
- SOR_STATE_ASY_DEPOL_POS,
- HDMI_NV_PDISP_SOR_STATE2);
+ val = SOR_STATE_ASY_CRCMODE_COMPLETE |
+ SOR_STATE_ASY_OWNER_HEAD0 |
+ SOR_STATE_ASY_SUBOWNER_BOTH |
+ SOR_STATE_ASY_PROTOCOL_SINGLE_TMDS_A |
+ SOR_STATE_ASY_DEPOL_POS;
+
+ if (dc->mode.flags & TEGRA_DC_MODE_FLAG_NEG_H_SYNC)
+ val |= SOR_STATE_ASY_HSYNCPOL_NEG;
+ else
+ val |= SOR_STATE_ASY_HSYNCPOL_POS;
+
+ if (dc->mode.flags & TEGRA_DC_MODE_FLAG_NEG_V_SYNC)
+ val |= SOR_STATE_ASY_VSYNCPOL_NEG;
+ else
+ val |= SOR_STATE_ASY_VSYNCPOL_POS;
+
+ tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_STATE2);
val = SOR_STATE_ASY_HEAD_OPMODE_AWAKE | SOR_STATE_ASY_ORMODE_NORMAL;
tegra_hdmi_writel(hdmi, val, HDMI_NV_PDISP_SOR_STATE1);