diff options
| author | Wojciech Bieganski <wbieganski@antmicro.com> | 2016-04-06 10:37:41 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2016-11-21 15:05:10 +0100 |
| commit | 6261e3f9a7a1367fe92cabc7c79cc444a3cca679 (patch) | |
| tree | b031731deb3dafb2b61ee382040470b0fb82aa95 /drivers | |
| parent | 0fc1465eef15c2e0704e38238a82017ca06928f5 (diff) | |
media: support for second single-lane decoder (ADV7280M)
Connected to CSI CIL-E. Cameras doesn't work simultaneously.
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/media/platform/soc_camera/tegra_camera/vi2.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/media/platform/soc_camera/tegra_camera/vi2.c b/drivers/media/platform/soc_camera/tegra_camera/vi2.c index 331f35cbd855..99bef12e1b7f 100644 --- a/drivers/media/platform/soc_camera/tegra_camera/vi2.c +++ b/drivers/media/platform/soc_camera/tegra_camera/vi2.c @@ -710,10 +710,10 @@ static int vi2_capture_setup_csi_1(struct tegra_camera_dev *cam, #endif if (pdata->port == TEGRA_CAMERA_PORT_CSI_B) { - TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILC_CONTROL0, 0x9); - TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILD_CONTROL0, 0x9); + TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILC_CONTROL0, 0x49); + TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILD_CONTROL0, 0x49); } else if (pdata->port == TEGRA_CAMERA_PORT_CSI_C) - TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILE_CONTROL0, 0x9); + TC_VI_REG_WT(cam, TEGRA_CSI_PHY_CILE_CONTROL0, 0x49); TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_PPB_COMMAND, 0xf007); TC_VI_REG_WT(cam, TEGRA_CSI_CSI_PIXEL_PARSER_B_INTERRUPT_MASK, 0x0); @@ -757,7 +757,9 @@ static int vi2_capture_setup_csi_1(struct tegra_camera_dev *cam, (icd->current_fmt->code == V4L2_MBUS_FMT_VYUY8_2X8) || (icd->current_fmt->code == V4L2_MBUS_FMT_YUYV8_2X8) || (icd->current_fmt->code == V4L2_MBUS_FMT_YVYU8_2X8)) { - /* TBD */ + format = TEGRA_IMAGE_FORMAT_T_U8_Y8__V8_Y8; + data_type = TEGRA_IMAGE_DT_YUV422_8; + image_size = icd->user_width * 2; } else if ((icd->current_fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8) || (icd->current_fmt->code == V4L2_MBUS_FMT_SGBRG8_1X8)) { format = TEGRA_IMAGE_FORMAT_T_L8; @@ -770,8 +772,7 @@ static int vi2_capture_setup_csi_1(struct tegra_camera_dev *cam, image_size = icd->user_width * 10 / 8; } - TC_VI_REG_WT(cam, TEGRA_VI_CSI_1_IMAGE_DEF, - (cam->tpg_mode ? 0 : 1 << 24) | (format << 16) | 0x1); + TC_VI_REG_WT(cam, TEGRA_VI_CSI_1_IMAGE_DEF, ((format << 16) | 0x1)); TC_VI_REG_WT(cam, TEGRA_VI_CSI_1_CSI_IMAGE_DT, data_type); |