diff options
| author | Xinliang Liu <xinliang.liu@linaro.org> | 2016-05-09 09:59:50 +0800 |
|---|---|---|
| committer | Xinliang Liu <xinliang.liu@linaro.org> | 2016-05-11 19:05:36 +0800 |
| commit | 165cccc8437704d9f41eae2946774bdf2966245f (patch) | |
| tree | 75b654e59f8274cb5bf576a46c6bf4624464d0fd /drivers | |
| parent | 12cb4c87aa587ff476ffc71120f2dc5d2e857256 (diff) | |
drm/hisilicon: Fix DRM_INFO printed issue
This patch fixed the bellow no DRM_INFO is printed issue:
if (!delay_count)
DRM_INFO("phylock and phystopstateclklane is not ready.\n");
There will some printed issues with above info, under certain
circumstances:
If ((BIT(0) | BIT(2)) & val) is never true, break will not happen and
delay_count will be max u32 value (?), and no DRM_INFO is printed.
Also if ((BIT(0) | BIT(2)) & val) is true at the last possible
loop round, break happens, but now delay_count is already zero
( because of earlier delay_count-- ) and DRM_INFO is erroneously
printed.
Thanks to Juha Leppänen, he reports to me this issue.
Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
Reported-by: Juha Leppänen <juha_efku@dnainternet.net>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c index bfbc2159250d..998452ad0fcb 100644 --- a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c +++ b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c @@ -430,12 +430,13 @@ static void dsi_set_mipi_phy(void __iomem *base, * wait for phy's clock ready */ delay_count = 100; - while (delay_count--) { + while (delay_count) { val = readl(base + PHY_STATUS); if ((BIT(0) | BIT(2)) & val) break; udelay(1); + delay_count--; } if (!delay_count) |