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authorLiu Ying <victor.liu@nxp.com>2019-11-26 11:15:11 +0800
committerLiu Ying <victor.liu@nxp.com>2019-12-17 14:23:53 +0800
commitac3d28840f8d295d78f88c3e045e43225d5d4c44 (patch)
tree6693eaafb75d5c8d9b115cda30d142c810935147 /drivers
parent4fa5f175ed0ddb8c3b7e819fc639d9cdefbad370 (diff)
MLK-23116-7 gpu: imx: imx8_dprc: Don't touch SYSTEM_CTRL0 in dprc_disable() for disp chan
To hot-switch pixel format from a native prefetch engine format to a non-native one for a display controller, we need to bypass PRG on-the-fly. The SoC designer requires us not to touch SYSTEM_CTRL0 register during the procedure. Not particularly sure if this requirement applies to blit engine or not. So, just off-line the touch for display controller. Reviewed-by: Sandor Yu <Sandor.yu@nxp.com> Signed-off-by: Liu Ying <victor.liu@nxp.com> (cherry picked from commit feb26807aabec0691790a81af8b3a6954deb50cd) (cherry picked from commit 428e486b770f82964f2480cefa9d73df4fc8b718)
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/imx/imx8_dprc.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/imx/imx8_dprc.c b/drivers/gpu/imx/imx8_dprc.c
index c88365ddb5dc..e25a0a01929d 100644
--- a/drivers/gpu/imx/imx8_dprc.c
+++ b/drivers/gpu/imx/imx8_dprc.c
@@ -281,7 +281,9 @@ void dprc_disable(struct dprc *dprc)
if (WARN_ON(!dprc))
return;
- dprc_write(dprc, SHADOW_LOAD_EN | SW_SHADOW_LOAD_SEL, SYSTEM_CTRL0);
+ if (dprc->is_blit_chan)
+ dprc_write(dprc, SHADOW_LOAD_EN | SW_SHADOW_LOAD_SEL,
+ SYSTEM_CTRL0);
prg_disable(dprc->prgs[0]);
if (dprc->has_aux_prg)