diff options
| author | Tom Lendacky <thomas.lendacky@amd.com> | 2014-07-10 10:58:35 -0500 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2014-07-23 21:28:38 +0800 |
| commit | 126ae9adc1ec8d9006542f1a5e474b0183845e21 (patch) | |
| tree | f3ee814b261aa440feae1b5785f797aaa16cced7 /drivers | |
| parent | 96956aef2ff5521af44d6cb896c967d025360ead (diff) | |
crypto: ccp - Base AXI DMA cache settings on device tree
The default cache operations for ARM64 were changed during 3.15.
To use coherent operations a "dma-coherent" device tree property
is required. If that property is not present in the device tree
node then the non-coherent operations are assigned for the device.
Add support to the ccp driver to assign the AXI DMA cache settings
based on whether the "dma-coherent" property is present in the device
node. If present, use settings that work with the caches. If not
present, use settings that do not look at the caches.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/crypto/ccp/Kconfig | 1 | ||||
| -rw-r--r-- | drivers/crypto/ccp/ccp-dev.c | 2 | ||||
| -rw-r--r-- | drivers/crypto/ccp/ccp-dev.h | 4 | ||||
| -rw-r--r-- | drivers/crypto/ccp/ccp-platform.c | 6 |
4 files changed, 12 insertions, 1 deletions
diff --git a/drivers/crypto/ccp/Kconfig b/drivers/crypto/ccp/Kconfig index 7639ffc36c68..474382d50ec4 100644 --- a/drivers/crypto/ccp/Kconfig +++ b/drivers/crypto/ccp/Kconfig @@ -3,6 +3,7 @@ config CRYPTO_DEV_CCP_DD depends on CRYPTO_DEV_CCP default m select HW_RANDOM + select OF if ARM64 help Provides the interface to use the AMD Cryptographic Coprocessor which can be used to accelerate or offload encryption operations diff --git a/drivers/crypto/ccp/ccp-dev.c b/drivers/crypto/ccp/ccp-dev.c index fa1ab10f960f..a7d110652a74 100644 --- a/drivers/crypto/ccp/ccp-dev.c +++ b/drivers/crypto/ccp/ccp-dev.c @@ -364,7 +364,7 @@ int ccp_init(struct ccp_device *ccp) #ifdef CONFIG_ARM64 /* For arm64 set the recommended queue cache settings */ - iowrite32(CACHE_WB_NO_ALLOC, ccp->io_regs + CMD_Q_CACHE_BASE + + iowrite32(ccp->axcache, ccp->io_regs + CMD_Q_CACHE_BASE + (CMD_Q_CACHE_INC * i)); #endif diff --git a/drivers/crypto/ccp/ccp-dev.h b/drivers/crypto/ccp/ccp-dev.h index 1c5651b09506..62ff35a6b9ec 100644 --- a/drivers/crypto/ccp/ccp-dev.h +++ b/drivers/crypto/ccp/ccp-dev.h @@ -30,6 +30,7 @@ #define TRNG_RETRIES 10 +#define CACHE_NONE 0x00 #define CACHE_WB_NO_ALLOC 0xb7 @@ -255,6 +256,9 @@ struct ccp_device { /* Suspend support */ unsigned int suspending; wait_queue_head_t suspend_queue; + + /* DMA caching attribute support */ + unsigned int axcache; }; diff --git a/drivers/crypto/ccp/ccp-platform.c b/drivers/crypto/ccp/ccp-platform.c index 65e58291c668..b0a2806908f1 100644 --- a/drivers/crypto/ccp/ccp-platform.c +++ b/drivers/crypto/ccp/ccp-platform.c @@ -22,6 +22,7 @@ #include <linux/spinlock.h> #include <linux/delay.h> #include <linux/ccp.h> +#include <linux/of.h> #include "ccp-dev.h" @@ -112,6 +113,11 @@ static int ccp_platform_probe(struct platform_device *pdev) *(dev->dma_mask) = DMA_BIT_MASK(48); dev->coherent_dma_mask = DMA_BIT_MASK(48); + if (of_property_read_bool(dev->of_node, "dma-coherent")) + ccp->axcache = CACHE_WB_NO_ALLOC; + else + ccp->axcache = CACHE_NONE; + dev_set_drvdata(dev, ccp); ret = ccp_init(ccp); |