summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
authorAntoine Tenart <antoine.tenart@free-electrons.com>2017-09-01 11:04:52 +0200
committerDavid S. Miller <davem@davemloft.net>2017-09-01 10:08:25 -0700
commit1df2270d06fa65c3479e713eb00eca25896db653 (patch)
tree11f04a6ba4db4ef581a12e16d19c1b15c6b7b1b6 /drivers
parent0d22a3cf8da164dfc694cc159eabd355f14aba7e (diff)
net: mvpp2: take advantage of the is_rgmii helper
Convert all RGMII checks to use the phy_interface_mode_is_rgmii() helper. This is a cosmetic patch. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/marvell/mvpp2.c15
1 files changed, 3 insertions, 12 deletions
diff --git a/drivers/net/ethernet/marvell/mvpp2.c b/drivers/net/ethernet/marvell/mvpp2.c
index 358a9de9daa7..b33be3ef25ae 100644
--- a/drivers/net/ethernet/marvell/mvpp2.c
+++ b/drivers/net/ethernet/marvell/mvpp2.c
@@ -4463,10 +4463,7 @@ static void mvpp2_port_mii_gmac_configure_mode(struct mvpp2_port *port)
val |= MVPP2_GMAC_DISABLE_PADDING;
val &= ~MVPP2_GMAC_FLOW_CTRL_MASK;
writel(val, port->base + MVPP2_GMAC_CTRL_2_REG);
- } else if (port->phy_interface == PHY_INTERFACE_MODE_RGMII ||
- port->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
- port->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID ||
- port->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) {
+ } else if (phy_interface_mode_is_rgmii(port->phy_interface)) {
val = readl(port->base + MVPP22_GMAC_CTRL_4_REG);
val |= MVPP22_CTRL4_EXT_PIN_GMII_SEL |
MVPP22_CTRL4_SYNC_BYPASS_DIS |
@@ -4512,10 +4509,7 @@ static void mvpp2_port_mii_gmac_configure(struct mvpp2_port *port)
val = readl(port->base + MVPP2_GMAC_CTRL_2_REG);
if (port->phy_interface == PHY_INTERFACE_MODE_SGMII) {
val |= MVPP2_GMAC_INBAND_AN_MASK | MVPP2_GMAC_PCS_ENABLE_MASK;
- } else if (port->phy_interface == PHY_INTERFACE_MODE_RGMII ||
- port->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
- port->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID ||
- port->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) {
+ } else if (phy_interface_mode_is_rgmii(port->phy_interface)) {
val &= ~MVPP2_GMAC_PCS_ENABLE_MASK;
val |= MVPP2_GMAC_PORT_RGMII_MASK;
}
@@ -4575,10 +4569,7 @@ static void mvpp2_port_mii_set(struct mvpp2_port *port)
if (port->priv->hw_version == MVPP22)
mvpp22_port_mii_set(port);
- if (port->phy_interface == PHY_INTERFACE_MODE_RGMII ||
- port->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
- port->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID ||
- port->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID ||
+ if (phy_interface_mode_is_rgmii(port->phy_interface) ||
port->phy_interface == PHY_INTERFACE_MODE_SGMII)
mvpp2_port_mii_gmac_configure(port);
else if (port->phy_interface == PHY_INTERFACE_MODE_10GKR)