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authorAndreas Oetken <ennoerlangen@gmail.com>2015-04-21 00:16:38 +0200
committerDavid S. Miller <davem@davemloft.net>2015-04-20 22:01:16 -0400
commit71cd26e76a9514715df7880db0a8f7c37c17149a (patch)
treed5b4569142e55730bbdf3881cd4569506d5a4120 /drivers
parent47cf1e659e0f44c29788a96345862c44c6a48c89 (diff)
altera tse: Error-Bit on tx-avalon-stream always set.
The Error-Bit on the avalon streaming interface of the tx-dma-channel was always set. In SGMII configurations this leads to error-symbols on the PCS and packet-rejection on the receiver side (e.g. SGMII/1000Base-X connected switch). This only applies to the tse-configuration with MSGDMA. This issue was detected and fixed on a custom board with a direct connection to a Marvell switch in SGMII-PHY-Mode. (incl. custom patches for SGMII-PCS). According to the datasheet if ff_tx_err (avalon-streaming) is set it is forwarded to gm_tx_err. As a result the PCS is forwarding the error by sending a "/V/"-caracter. Signed-off-by: Andreas Oetken <ennoerlangen@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/altera/altera_msgdmahw.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/net/ethernet/altera/altera_msgdmahw.h b/drivers/net/ethernet/altera/altera_msgdmahw.h
index e335626e1b6b..eba070f16782 100644
--- a/drivers/net/ethernet/altera/altera_msgdmahw.h
+++ b/drivers/net/ethernet/altera/altera_msgdmahw.h
@@ -72,7 +72,6 @@ struct msgdma_extended_desc {
#define MSGDMA_DESC_CTL_TX_SINGLE (MSGDMA_DESC_CTL_GEN_SOP | \
MSGDMA_DESC_CTL_GEN_EOP | \
MSGDMA_DESC_CTL_TR_COMP_IRQ | \
- MSGDMA_DESC_CTL_TR_ERR_IRQ | \
MSGDMA_DESC_CTL_GO)
#define MSGDMA_DESC_CTL_RX_SINGLE (MSGDMA_DESC_CTL_END_ON_EOP | \