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authorZebulon McCorkle <zebmccorkle@zeb.fun>2017-11-21 14:51:14 -0600
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-12-06 10:00:30 +0100
commitf3b7e9019de4d23d3d05b4b47d7b622635249de4 (patch)
tree09dbb971ca807276a2adbaacf0e5e99e89342ff9 /drivers
parentf8de92c9f616d87881a772f5d25d8d4041455573 (diff)
staging: olpc_dcon: Change bitshifts to BIT macro
checkpatch.pl reported the bitshifts (1<<x) as a style violation, so change them to the BIT macro (BIT(x)). Signed-off-by: Zebulon McCorkle <zebmccorkle@zeb.fun> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/staging/olpc_dcon/olpc_dcon.h30
1 files changed, 15 insertions, 15 deletions
diff --git a/drivers/staging/olpc_dcon/olpc_dcon.h b/drivers/staging/olpc_dcon/olpc_dcon.h
index 8fbde5d3b4a6..fa89bb97c7b0 100644
--- a/drivers/staging/olpc_dcon/olpc_dcon.h
+++ b/drivers/staging/olpc_dcon/olpc_dcon.h
@@ -10,18 +10,18 @@
#define DCON_REG_ID 0
#define DCON_REG_MODE 1
-#define MODE_PASSTHRU (1<<0)
-#define MODE_SLEEP (1<<1)
-#define MODE_SLEEP_AUTO (1<<2)
-#define MODE_BL_ENABLE (1<<3)
-#define MODE_BLANK (1<<4)
-#define MODE_CSWIZZLE (1<<5)
-#define MODE_COL_AA (1<<6)
-#define MODE_MONO_LUMA (1<<7)
-#define MODE_SCAN_INT (1<<8)
-#define MODE_CLOCKDIV (1<<9)
-#define MODE_DEBUG (1<<14)
-#define MODE_SELFTEST (1<<15)
+#define MODE_PASSTHRU BIT(0)
+#define MODE_SLEEP BIT(1)
+#define MODE_SLEEP_AUTO BIT(2)
+#define MODE_BL_ENABLE BIT(3)
+#define MODE_BLANK BIT(4)
+#define MODE_CSWIZZLE BIT(5)
+#define MODE_COL_AA BIT(6)
+#define MODE_MONO_LUMA BIT(7)
+#define MODE_SCAN_INT BIT(8)
+#define MODE_CLOCKDIV BIT(9)
+#define MODE_DEBUG BIT(14)
+#define MODE_SELFTEST BIT(15)
#define DCON_REG_HRES 0x2
#define DCON_REG_HTOTAL 0x3
@@ -36,11 +36,11 @@
#define DCON_REG_MEM_OPT_B 0x42
/* Load Delay Locked Loop (DLL) settings for clock delay */
-#define MEM_DLL_CLOCK_DELAY (1<<0)
+#define MEM_DLL_CLOCK_DELAY BIT(0)
/* Memory controller power down function */
-#define MEM_POWER_DOWN (1<<8)
+#define MEM_POWER_DOWN BIT(8)
/* Memory controller software reset */
-#define MEM_SOFT_RESET (1<<0)
+#define MEM_SOFT_RESET BIT(0)
/* Status values */