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authorWen Yi <wyi@nvidia.com>2011-04-14 17:10:54 -0700
committerVarun Colbert <vcolbert@nvidia.com>2011-04-28 10:43:23 -0700
commiteb2de36484ad0417da78eaa0f2c08deab8db514c (patch)
treeda2b0f8f40a63c699eae74b8169c679628a1a3c3 /drivers
parent7680c7e7fb89a5f8e2d0ec7f7e3bee95fd2ef373 (diff)
usb: tegra: set emc clock hint to 300 mhz for usb
EMC clock has been set to 400 mhz if USB is enabled. This value set the DDR frequency to 300 mhz. Test showed that DDR 150 mhz is sufficient to meet the throughput requirement and thus emc clock is set to 300 mhz to achieve 150 mhz DDR clock to save power. Bug 817738 Change-Id: I98e6ae46ac04ebd3a5c82793d6aaada23a85c7e0 Reviewed-on: http://git-master/r/27810 Reviewed-by: Wen Yi <wyi@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/usb/gadget/fsl_tegra_udc.c2
-rw-r--r--drivers/usb/host/ehci-tegra.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/usb/gadget/fsl_tegra_udc.c b/drivers/usb/gadget/fsl_tegra_udc.c
index 87b1d5d92cd5..c378d797bdd0 100644
--- a/drivers/usb/gadget/fsl_tegra_udc.c
+++ b/drivers/usb/gadget/fsl_tegra_udc.c
@@ -42,7 +42,7 @@ int fsl_udc_clk_init(struct platform_device *pdev)
}
clk_enable(emc_clk);
- clk_set_rate(emc_clk, 400000000);
+ clk_set_rate(emc_clk, 300000000);
/* we have to remap the registers ourselves as fsl_udc does not
* export them for us.
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index f832e2a5e9cc..a12d8c4ca908 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -837,7 +837,7 @@ static int tegra_ehci_probe(struct platform_device *pdev)
}
clk_enable(tegra->emc_clk);
- clk_set_rate(tegra->emc_clk, 400000000);
+ clk_set_rate(tegra->emc_clk, 300000000);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {