diff options
| author | Harry Hong <hhong@nvidia.com> | 2012-02-08 17:19:26 +0900 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-03-05 16:51:22 -0800 |
| commit | d8e0b3a28736a8bed4e7b6b63b2e03225d463549 (patch) | |
| tree | a9c728693b667af1a1db0577cbd3044e1ccbe09b /drivers | |
| parent | 2767dcc7741bc12291c521b00d4c9efeceec3def (diff) | |
mmc: tegra: Clear SPI_MODE_CLKEN_OVERRIDE bit by default
This bit should always be 0 according to TRM.
Bug 929985
Signed-off-by: Harry Hong <hhong@nvidia.com>
Reviewed-on: http://git-master/r/79975
(cherry picked from commit 9371d04b4f9d79f1e03e60120bf1bba28af77d4b)
Change-Id: I225d6b5442f63809a77ce92d9cbd152dc4112ac4
Reviewed-on: http://git-master/r/87640
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mmc/host/sdhci-tegra.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 6d61aaee5fbe..fb728291ffe8 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -36,6 +36,7 @@ #define SDHCI_VENDOR_CLOCK_CNTRL 0x100 #define SDHCI_VENDOR_CLOCK_CNTRL_SDMMC_CLK 0x1 #define SDHCI_VENDOR_CLOCK_CNTRL_PADPIPE_CLKEN_OVERRIDE 0x8 +#define SDHCI_VENDOR_CLOCK_CNTRL_SPI_MODE_CLKEN_OVERRIDE 0x4 #define SDHCI_VENDOR_CLOCK_CNTRL_BASE_CLK_FREQ_SHIFT 8 #define SDHCI_VENDOR_CLOCK_CNTRL_TAP_VALUE_SHIFT 16 #define SDHCI_VENDOR_CLOCK_CNTRL_SDR50_TUNING 0x20 @@ -190,6 +191,8 @@ static void tegra3_sdhci_post_reset_init(struct sdhci_host *sdhci) vendor_ctrl |= (tegra3_sdhost_max_clk[tegra_host->instance] / 1000000) << SDHCI_VENDOR_CLOCK_CNTRL_BASE_CLK_FREQ_SHIFT; vendor_ctrl |= SDHCI_VENDOR_CLOCK_CNTRL_PADPIPE_CLKEN_OVERRIDE; + vendor_ctrl &= ~SDHCI_VENDOR_CLOCK_CNTRL_SPI_MODE_CLKEN_OVERRIDE; + /* Set tap delay */ if (plat->tap_delay) { vendor_ctrl &= ~(0xFF << |