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authorErik Gilling <konkers@android.com>2010-10-26 21:05:43 -0700
committerErik Gilling <konkers@android.com>2010-10-26 21:06:39 -0700
commite92acc7f00ca0388a82b435215b3f3be41a109f4 (patch)
tree87653416e3c1fcbfb405906779acaf2f541671da /drivers
parent93198982100b0b04c84dad68bc13de2e807249c9 (diff)
video: tegra: fix dvfs for hdmi
Change-Id: I4e6eef34a1e794e622bec10c9025b3820cd6ba8d Signed-off-by: Erik Gilling <konkers@android.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/video/tegra/dc/dc.c37
1 files changed, 19 insertions, 18 deletions
diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c
index cb7ef27f564b..2f9aea545cff 100644
--- a/drivers/video/tegra/dc/dc.c
+++ b/drivers/video/tegra/dc/dc.c
@@ -584,8 +584,25 @@ int tegra_dc_sync_windows(struct tegra_dc_win *windows[], int n)
}
EXPORT_SYMBOL(tegra_dc_sync_windows);
+static unsigned long tegra_dc_pclk_round_rate(struct tegra_dc *dc, int pclk)
+{
+ unsigned long rate;
+ unsigned long div;
+
+ rate = clk_get_rate(dc->clk);
+
+ div = DIV_ROUND_CLOSEST(rate * 2, pclk);
+
+ if (div < 2)
+ return 0;
+
+ return rate * 2 / div;
+}
+
void tegra_dc_setup_clk(struct tegra_dc *dc, struct clk *clk)
{
+ int pclk;
+
if (dc->out->type == TEGRA_DC_OUT_HDMI) {
unsigned long rate;
struct clk *pll_d_out0_clk =
@@ -604,21 +621,10 @@ void tegra_dc_setup_clk(struct tegra_dc *dc, struct clk *clk)
if (clk_get_parent(clk) != pll_d_out0_clk)
clk_set_parent(clk, pll_d_out0_clk);
}
-}
-static unsigned long tegra_dc_pclk_round_rate(struct tegra_dc *dc, int pclk)
-{
- unsigned long rate;
- unsigned long div;
-
- rate = clk_get_rate(dc->clk);
-
- div = DIV_ROUND_CLOSEST(rate * 2, pclk);
-
- if (div < 2)
- return 0;
+ pclk = tegra_dc_pclk_round_rate(dc, dc->mode.pclk);
+ tegra_dvfs_set_rate(clk, pclk);
- return rate * 2 / div;
}
static int tegra_dc_program_mode(struct tegra_dc *dc, struct tegra_dc_mode *mode)
@@ -837,8 +843,6 @@ static void tegra_dc_init(struct tegra_dc *dc)
static bool _tegra_dc_enable(struct tegra_dc *dc)
{
- int pclk;
-
if (dc->mode.pclk == 0)
return false;
@@ -849,9 +853,6 @@ static bool _tegra_dc_enable(struct tegra_dc *dc)
tegra_dc_setup_clk(dc, dc->clk);
- pclk = tegra_dc_pclk_round_rate(dc, dc->mode.pclk);
- tegra_dvfs_set_rate(dc->clk, pclk);
-
clk_enable(dc->clk);
enable_irq(dc->irq);