diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2014-01-13 10:18:03 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-01-20 12:05:16 -0500 |
| commit | 6dfa09d7c9dd73fbcd9c7edbb4fa947637d4ed6e (patch) | |
| tree | 82e96029f304a1c7c6f341b2aa4e82f163ee3946 /drivers | |
| parent | 919cf555c04e16dafb1fba56904eb23889a812c3 (diff) | |
drm/radeon/cik: use hw defaults for TC_CFG registers
Use the hw power up values rather than 0.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/radeon/cik.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index e8ec15dfe5f8..6ffe824624fb 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -5353,20 +5353,6 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev) WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT | WRITE_PROTECTION_FAULT_ENABLE_DEFAULT); - /* TC cache setup ??? */ - WREG32(TC_CFG_L1_LOAD_POLICY0, 0); - WREG32(TC_CFG_L1_LOAD_POLICY1, 0); - WREG32(TC_CFG_L1_STORE_POLICY, 0); - - WREG32(TC_CFG_L2_LOAD_POLICY0, 0); - WREG32(TC_CFG_L2_LOAD_POLICY1, 0); - WREG32(TC_CFG_L2_STORE_POLICY0, 0); - WREG32(TC_CFG_L2_STORE_POLICY1, 0); - WREG32(TC_CFG_L2_ATOMIC_POLICY, 0); - - WREG32(TC_CFG_L1_VOLATILE, 0); - WREG32(TC_CFG_L2_VOLATILE, 0); - if (rdev->family == CHIP_KAVERI) { u32 tmp = RREG32(CHUB_CONTROL); tmp &= ~BYPASS_VM; |