diff options
author | Hiroshi Doyu <hdoyu@nvidia.com> | 2013-08-09 10:54:16 +0300 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 13:39:50 -0700 |
commit | bf52d0edfa941d7892ab1cf484f244fa8aa03d3e (patch) | |
tree | 643c54fcd77d6acc29315d771a92202337ccecb6 /drivers | |
parent | d3ee5a917c733a1f185f357719ce95ca13c49ba3 (diff) |
iommu/tegra: smmu: Disable SDMMC ordered
SDMMC controller doesn't need to ORDERED client of SMMU otherwise
there is the possible expense of perf hit. SDMMC controller indicates
the status bit after the read/writes from/to DRAM are acked by MC,
There is no need to enable ORDRED for SDMMC. The framework itself is
left for the later use.
Bug 1338987
Change-Id: I7b90ccec5b9bc5dc9e76657205bf1fda0cc0863f
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/259994
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/iommu/tegra-smmu.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index 2992cb669cd1..48337d1958c3 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -413,10 +413,7 @@ static void __smmu_client_ordered(struct smmu_device *smmu, int id) static void smmu_client_ordered(struct smmu_device *smmu) { int i, id[] = { - CSW_SDMMCWA, - CSW_SDMMCWAA, - CSW_SDMMCW, - CSW_SDMMCWAB, + /* Add client ID here to be ordered */ }; for (i = 0; i < ARRAY_SIZE(id); i++) |