diff options
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2014-01-08 11:12:28 -0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-01-08 18:33:56 +0100 |
| commit | 89eff4bea721700d1f4d5ffd3fdc99bb0de9e962 (patch) | |
| tree | bb1c0602a960827ba5fa4670c01c8002c7f4885c /drivers | |
| parent | e59150dcf7e126ebf89afacd372602f328d4d6fc (diff) | |
drm/i915: fix wrong PLL debug messages.
LPT does have PCH refclk, but it's different form the IBX/CPT/PPT one
and doesn't use the same structs. It is wrong to have a message saying
that "LPT does not has PCH refclk" (sic). While at it, signal that we
only want this function on IBX/CPT/PPT by renaming it and adding a
WARN.
On HSW we also print "0 shared PLLs initialized", but we *do* have
shared PLLs on HSW (LCPLL, WRPLL, SPLL) and we *do* initialize them.
We just don't use "struct intel_shared_dpll". So remove the debug
message.
In the future we may want to rename all that "intel shared pll" code
to "ibx shared pll", but I'll leave this to another patch.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 767e05c2cb76..bc520eb698a1 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1211,15 +1211,12 @@ static void assert_sprites_disabled(struct drm_i915_private *dev_priv, } } -static void assert_pch_refclk_enabled(struct drm_i915_private *dev_priv) +static void ibx_assert_pch_refclk_enabled(struct drm_i915_private *dev_priv) { u32 val; bool enabled; - if (HAS_PCH_LPT(dev_priv->dev)) { - DRM_DEBUG_DRIVER("LPT does not has PCH refclk, skipping check\n"); - return; - } + WARN_ON(!(HAS_PCH_IBX(dev_priv->dev) || HAS_PCH_CPT(dev_priv->dev))); val = I915_READ(PCH_DREF_CONTROL); enabled = !!(val & (DREF_SSC_SOURCE_MASK | DREF_NONSPREAD_SOURCE_MASK | @@ -10077,7 +10074,7 @@ static void ibx_pch_dpll_enable(struct drm_i915_private *dev_priv, struct intel_shared_dpll *pll) { /* PCH refclock must be enabled first */ - assert_pch_refclk_enabled(dev_priv); + ibx_assert_pch_refclk_enabled(dev_priv); I915_WRITE(PCH_DPLL(pll->id), pll->hw_state.dpll); @@ -10145,8 +10142,6 @@ static void intel_shared_dpll_init(struct drm_device *dev) dev_priv->num_shared_dpll = 0; BUG_ON(dev_priv->num_shared_dpll > I915_NUM_PLLS); - DRM_DEBUG_KMS("%i shared PLLs initialized\n", - dev_priv->num_shared_dpll); } static void intel_crtc_init(struct drm_device *dev, int pipe) |