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authorBob Moore <robert.moore@intel.com>2013-10-29 09:29:45 +0800
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-10-30 12:24:22 +0100
commite07fcfd89f9bbbc5f655b85b70e6f9b0bb626bac (patch)
treef51df8ea58847f0fb01a9803530fddc6eb766269 /drivers
parentab3b24807adabdc32f8a9d5d7d3902e1e744d139 (diff)
ACPICA: Hardcode access width for the reset register.
The ACPI spec requires the reset register width to be 8, so we now hardcode it and ignore the FADT value. This provides/maintains compatibility with other ACPI implementations that have allowed BIOS code with bad register width values to go unnoticed. Matthew Garett, Bob Moore, Lv Zheng. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/acpi/acpica/hwxface.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/acpi/acpica/hwxface.c b/drivers/acpi/acpica/hwxface.c
index f81fb068d20e..d3682c2ae0d1 100644
--- a/drivers/acpi/acpica/hwxface.c
+++ b/drivers/acpi/acpica/hwxface.c
@@ -83,11 +83,17 @@ acpi_status acpi_reset(void)
* For I/O space, write directly to the OSL. This bypasses the port
* validation mechanism, which may block a valid write to the reset
* register.
- * Spec section 4.7.3.6 requires register width to be 8.
+ *
+ * NOTE:
+ * The ACPI spec requires the reset register width to be 8, so we
+ * hardcode it here and ignore the FADT value. This maintains
+ * compatibility with other ACPI implementations that have allowed
+ * BIOS code with bad register width values to go unnoticed.
*/
status =
acpi_os_write_port((acpi_io_address) reset_reg->address,
- acpi_gbl_FADT.reset_value, 8);
+ acpi_gbl_FADT.reset_value,
+ ACPI_RESET_REGISTER_WIDTH);
} else {
/* Write the reset value to the reset register */