diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2018-03-19 10:53:42 +0100 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-12-24 01:27:32 +0100 |
| commit | ba924a94d4716408b0406bdecf4dbc8641a838c7 (patch) | |
| tree | 5db8c01419a22b8e5d2c7c5d8e8ecd302bc891c4 /drivers | |
| parent | c740b08eef8ff0f282bbae6cfb962025314a4879 (diff) | |
Revert "MLK-14498-2 ARM: imx7d: clk: select uart clock parent and rate"
This seems to limit possible baud rates due to lower input clock.
Since Toradex modules do not use UART5/6 as console, do not set
clock explicitly.
This reverts commit 4f447cb8bccb1d40973e46478d7b11aa61961c90.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/imx/clk-imx7d.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c index 041d7b54f0e2..226289737ce2 100644 --- a/drivers/clk/imx/clk-imx7d.c +++ b/drivers/clk/imx/clk-imx7d.c @@ -921,11 +921,6 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) /* set parent of SIM1 root clock */ imx_clk_set_parent(clks[IMX7D_SIM1_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_120M_CLK]); - imx_clk_set_parent(clks[IMX7D_UART5_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]); - imx_clk_set_rate(clks[IMX7D_UART5_ROOT_DIV], 80000000); - imx_clk_set_parent(clks[IMX7D_UART6_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]); - imx_clk_set_rate(clks[IMX7D_UART6_ROOT_DIV], 80000000); - imx_register_uart_clocks(uart_clks); } CLK_OF_DECLARE(imx7d, "fsl,imx7d-ccm", imx7d_clocks_init); |