mfd: max8907c: Prog pwren to power down/up core

apis added to program max8907c regulator to power down and up core supply rail
via the pwren signal on enter and exit deep sleep mode.

Bug 817378

Change-Id: I5af04db22b6c84fc4359c1a0cf209710ca144159
Reviewed-on: http://git-master/r/28434
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

1 files changed, 73 insertions, 0 deletions

diff --git a/drivers/mfd/max8907c.c b/drivers/mfd/max8907c.c
index 8bf47822f5c3..1a5f613ffdb7 100644
--- a/drivers/mfd/max8907c.c
+++ b/drivers/mfd/max8907c.c
@@ -161,6 +161,28 @@ int max8907c_power_off(void)
 						MAX8907C_MASK_POWER_OFF, 0x40);
 }
 
+void max8907c_deep_sleep(int enter)
+{
+	if (!max8907c_client)
+		return;
+
+	if (enter) {
+		max8907c_reg_write(max8907c_client, MAX8907C_REG_SDSEQCNT1,
+						MAX8907C_POWER_UP_DELAY_CNT12);
+		max8907c_reg_write(max8907c_client, MAX8907C_REG_SDSEQCNT2,
+							MAX8907C_DELAY_CNT0);
+		max8907c_reg_write(max8907c_client, MAX8907C_REG_SDCTL2,
+							MAX8907C_SD_SEQ2);
+	} else {
+		max8907c_reg_write(max8907c_client, MAX8907C_REG_SDSEQCNT1,
+							MAX8907C_DELAY_CNT0);
+		max8907c_reg_write(max8907c_client, MAX8907C_REG_SDCTL2,
+							MAX8907C_SD_SEQ1);
+		max8907c_reg_write(max8907c_client, MAX8907C_REG_SDSEQCNT2,
+				MAX8907C_POWER_UP_DELAY_CNT1 | MAX8907C_POWER_DOWN_DELAY_CNT12);
+	}
+}
+
 static int max8907c_remove_subdev(struct device *dev, void *unused)
 {
 	platform_device_unregister(to_platform_device(dev));
@@ -198,6 +220,54 @@ error:
 	return ret;
 }
 
+int max8907c_pwr_en_config(void)
+{
+	int ret;
+	u8 data;
+
+	if (!max8907c_client)
+		return -EINVAL;
+
+	/*
+	 * Enable/disable PWREN h/w control mechanism (PWREN signal must be
+	 * inactive = high at this time)
+	 */
+	ret = max8907c_set_bits(max8907c_client, MAX8907C_REG_RESET_CNFG,
+					MAX8907C_MASK_PWR_EN, MAX8907C_PWR_EN);
+	if (ret != 0)
+		return ret;
+
+	/*
+	 * When enabled, connect PWREN to SEQ2 by clearing SEQ2 configuration
+	 * settings for silicon revision that requires s/w WAR. On other
+	 * MAX8907B revisions PWREN is always connected to SEQ2.
+	 */
+	data = max8907c_reg_read(max8907c_client, MAX8907C_REG_II2RR);
+
+	if (data == MAX8907B_II2RR_PWREN_WAR) {
+		data = 0x00;
+		ret = max8907c_reg_write(max8907c_client, MAX8907C_REG_SEQ2CNFG, data);
+	}
+	return ret;
+}
+
+int max8907c_pwr_en_attach(void)
+{
+	int ret;
+
+	if (!max8907c_client)
+		return -EINVAL;
+
+	/* No sequencer delay for CPU rail when it is attached */
+	ret = max8907c_reg_write(max8907c_client, MAX8907C_REG_SDSEQCNT1,
+							MAX8907C_DELAY_CNT0);
+	if (ret != 0)
+		return ret;
+
+	return max8907c_set_bits(max8907c_client, MAX8907C_REG_SDCTL1,
+					MAX8907C_MASK_CTL_SEQ, MAX8907C_CTL_SEQ);
+}
+
 static int max8907c_i2c_probe(struct i2c_client *i2c,
 			      const struct i2c_device_id *id)
 {
@@ -238,6 +308,9 @@ static int max8907c_i2c_probe(struct i2c_client *i2c,
 
 	ret = max8097c_add_subdevs(max8907c, pdata);
 
+	if (pdata->max8907c_setup)
+		return pdata->max8907c_setup();
+
 	return ret;
 }