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authorDavid Härdeman <david@hardeman.nu>2006-10-27 20:56:51 -0300
committerMauro Carvalho Chehab <mchehab@infradead.org>2006-11-02 23:58:06 -0300
commitecba77f246011344f0b8f46eb25ae01ab4ae282d (patch)
tree223bf061e47f749aa3b30841eb5c46858bd7f78d /drivers
parent6c8c21b9119cfe68a99825085014bba4f9c0c768 (diff)
V4L/DVB (4785): Budget-ci: Change DEBIADDR_IR to a safer default
The IR chip has no address decoding, so the IR data is always present in the high byte when doing a read from the saa7146 chip. This means that the DEBI address used is irrelevant to the IR decoding logic. DEBI addresses 0x1XXX are mapped to the registers on the CI module itself, but only the lowest two bits are actually used (see EN50221, section A.2.2.1), meaning that 0x1234 is equivalent to 0x1000 which maps to register 0 (the data register). A read from the data register is supposed to be preceded by a read from the size register, so some CI modules will be confused (the AlphaCrypt CAM will hang completely). The attached patch changes the address used when reading the IR data to use 0x4000 instead. This is the CI version address, which is a safer default, works with the AlphaCrypt CAM and matches the behaviour of the Windows driver (AFAIK). Signed-off-by: David Härdeman <david@hardeman.nu> Signed-off-by: Oliver Endriss <o.endriss@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/media/dvb/ttpci/budget-ci.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/media/dvb/ttpci/budget-ci.c b/drivers/media/dvb/ttpci/budget-ci.c
index 2a2e9b400613..ac0cecb14dc3 100644
--- a/drivers/media/dvb/ttpci/budget-ci.c
+++ b/drivers/media/dvb/ttpci/budget-ci.c
@@ -46,7 +46,14 @@
#include "bsbe1.h"
#include "bsru6.h"
-#define DEBIADDR_IR 0x1234
+/*
+ * Regarding DEBIADDR_IR:
+ * Some CI modules hang if random addresses are read.
+ * Using address 0x4000 for the IR read means that we
+ * use the same address as for CI version, which should
+ * be a safe default.
+ */
+#define DEBIADDR_IR 0x4000
#define DEBIADDR_CICONTROL 0x0000
#define DEBIADDR_CIVERSION 0x4000
#define DEBIADDR_IO 0x1000