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authorFrancesco Dolcini <francesco.dolcini@toradex.com>2023-04-11 11:52:58 +0200
committerFrancesco Dolcini <francesco.dolcini@toradex.com>2023-04-28 14:38:25 +0200
commit540c31b9bcec0223fba0330e90ce3399b3ec42cf (patch)
tree75bdeba427cb17a70720b90b1a4e35041433f582 /fs
parent75c2323cabf9f35cee2731a93c1e421b73886f49 (diff)
drm/bridge: tc358768: fix PLL target frequency
Correctly compute the PLL target frequency, the current formula works correctly only when the input bus width is 24bit, actually to properly compute the PLL target frequency what is relevant is the bits-per-pixel on the DSI link. No regression expected since the DSI format is currently hard-coded as MIPI_DSI_FMT_RGB888. Upstream-Status: Submitted [https://lore.kernel.org/all/20230427142934.55435-1-francesco@dolcini.it/] Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver") Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Diffstat (limited to 'fs')
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