diff options
| author | Thomas Gleixner <tglx@tglx.tec.linutronix.de> | 2005-07-13 10:45:00 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@mtd.linutronix.de> | 2005-07-13 10:45:00 +0200 |
| commit | 1b3035b7fcc72b6b36f2a3634dad832eb2453ce8 (patch) | |
| tree | 728174d72943cc9b981a5843553551df62eddc41 /include/acpi/pdc_intel.h | |
| parent | a98a5d04f400ad112e59cadd739dbabf89417e60 (diff) | |
| parent | c32511e2718618f0b53479eb36e07439aa363a74 (diff) | |
Merge with rsync://fileserver/linux
Diffstat (limited to 'include/acpi/pdc_intel.h')
| -rw-r--r-- | include/acpi/pdc_intel.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/include/acpi/pdc_intel.h b/include/acpi/pdc_intel.h new file mode 100644 index 000000000000..fd6730e4e567 --- /dev/null +++ b/include/acpi/pdc_intel.h @@ -0,0 +1,29 @@ + +/* _PDC bit definition for Intel processors */ + +#ifndef __PDC_INTEL_H__ +#define __PDC_INTEL_H__ + +#define ACPI_PDC_P_FFH (0x0001) +#define ACPI_PDC_C_C1_HALT (0x0002) +#define ACPI_PDC_T_FFH (0x0004) +#define ACPI_PDC_SMP_C1PT (0x0008) +#define ACPI_PDC_SMP_C2C3 (0x0010) +#define ACPI_PDC_SMP_P_SWCOORD (0x0020) +#define ACPI_PDC_SMP_C_SWCOORD (0x0040) +#define ACPI_PDC_SMP_T_SWCOORD (0x0080) +#define ACPI_PDC_C_C1_FFH (0x0100) + + +#define ACPI_PDC_EST_CAPABILITY_SMP (ACPI_PDC_SMP_C1PT | \ + ACPI_PDC_C_C1_HALT) + +#define ACPI_PDC_EST_CAPABILITY_SMP_MSR (ACPI_PDC_EST_CAPABILITY_SMP | \ + ACPI_PDC_P_FFH) + +#define ACPI_PDC_C_CAPABILITY_SMP (ACPI_PDC_SMP_C2C3 | \ + ACPI_PDC_SMP_C1PT | \ + ACPI_PDC_C_C1_HALT) + +#endif /* __PDC_INTEL_H__ */ + |