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authorLin Ming <ming.m.lin@intel.com>2008-09-27 11:26:59 +0800
committerLen Brown <len.brown@intel.com>2008-10-22 23:14:46 -0400
commitbbbbeb8e31af97f11b84294b2e7e5607125829d2 (patch)
treeb590d627d83a801990dd862cb72381851e81c05b /include/acpi
parent51f52819bd02112a1f61f0741231f14bdb0cae7b (diff)
ACPICA: Remove unused ACPI register bit definition
Removed the ACPI_BITREG_WAKE_ENABLE definition and entry in the global register table. This bit does not exist and is unused. http://www.acpica.org/bugzilla/show_bug.cgi?id=442 Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'include/acpi')
-rw-r--r--include/acpi/actypes.h34
1 files changed, 23 insertions, 11 deletions
diff --git a/include/acpi/actypes.h b/include/acpi/actypes.h
index 6bd08e83f31c..e8936ab59627 100644
--- a/include/acpi/actypes.h
+++ b/include/acpi/actypes.h
@@ -607,8 +607,15 @@ typedef u8 acpi_adr_space_type;
/*
* bit_register IDs
- * These are bitfields defined within the full ACPI registers
+ *
+ * These values are intended to be used by the hardware interfaces
+ * and are mapped to individual bitfields defined within the ACPI
+ * registers. See the acpi_gbl_bit_register_info global table in utglobal.c
+ * for this mapping.
*/
+
+/* PM1 Status register */
+
#define ACPI_BITREG_TIMER_STATUS 0x00
#define ACPI_BITREG_BUS_MASTER_STATUS 0x01
#define ACPI_BITREG_GLOBAL_LOCK_STATUS 0x02
@@ -618,24 +625,29 @@ typedef u8 acpi_adr_space_type;
#define ACPI_BITREG_WAKE_STATUS 0x06
#define ACPI_BITREG_PCIEXP_WAKE_STATUS 0x07
+/* PM1 Enable register */
+
#define ACPI_BITREG_TIMER_ENABLE 0x08
#define ACPI_BITREG_GLOBAL_LOCK_ENABLE 0x09
#define ACPI_BITREG_POWER_BUTTON_ENABLE 0x0A
#define ACPI_BITREG_SLEEP_BUTTON_ENABLE 0x0B
#define ACPI_BITREG_RT_CLOCK_ENABLE 0x0C
-#define ACPI_BITREG_WAKE_ENABLE 0x0D
-#define ACPI_BITREG_PCIEXP_WAKE_DISABLE 0x0E
+#define ACPI_BITREG_PCIEXP_WAKE_DISABLE 0x0D
+
+/* PM1 Control register */
+
+#define ACPI_BITREG_SCI_ENABLE 0x0E
+#define ACPI_BITREG_BUS_MASTER_RLD 0x0F
+#define ACPI_BITREG_GLOBAL_LOCK_RELEASE 0x10
+#define ACPI_BITREG_SLEEP_TYPE_A 0x11
+#define ACPI_BITREG_SLEEP_TYPE_B 0x12
+#define ACPI_BITREG_SLEEP_ENABLE 0x13
-#define ACPI_BITREG_SCI_ENABLE 0x0F
-#define ACPI_BITREG_BUS_MASTER_RLD 0x10
-#define ACPI_BITREG_GLOBAL_LOCK_RELEASE 0x11
-#define ACPI_BITREG_SLEEP_TYPE_A 0x12
-#define ACPI_BITREG_SLEEP_TYPE_B 0x13
-#define ACPI_BITREG_SLEEP_ENABLE 0x14
+/* PM2 Control register */
-#define ACPI_BITREG_ARB_DISABLE 0x15
+#define ACPI_BITREG_ARB_DISABLE 0x14
-#define ACPI_BITREG_MAX 0x15
+#define ACPI_BITREG_MAX 0x14
#define ACPI_NUM_BITREG ACPI_BITREG_MAX + 1
/*