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authorLennert Buytenhek <buytenh@wantstofly.org>2006-09-18 23:22:24 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-25 10:25:46 +0100
commit610300e8f4f833904096ca1233ffd9dbd73fb11f (patch)
tree2b8e26c511edbbfc666af184a3de984c03d06220 /include/asm-arm/arch-iop32x
parent38ce73ebd74a9a1738b73619557f2397c59ba628 (diff)
[ARM] 3826/1: iop3xx: remove IOP3??_IRQ_OFS irq offset
Get rid of the unused IOP3??_IRQ_OFS irq offset define, start IRQ numbering from zero. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-iop32x')
-rw-r--r--include/asm-arm/arch-iop32x/entry-macro.S1
-rw-r--r--include/asm-arm/arch-iop32x/irqs.h68
2 files changed, 29 insertions, 40 deletions
diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S
index 00038c17317a..c5ec1e23cbea 100644
--- a/include/asm-arm/arch-iop32x/entry-macro.S
+++ b/include/asm-arm/arch-iop32x/entry-macro.S
@@ -24,6 +24,5 @@
clz \irqnr, \irqstat
mov \base, #31
subs \irqnr,\base,\irqnr
- add \irqnr,\irqnr,#IRQ_IOP321_DMA0_EOT
1001:
.endm
diff --git a/include/asm-arm/arch-iop32x/irqs.h b/include/asm-arm/arch-iop32x/irqs.h
index 4b0c82711f96..9fefcf3372b1 100644
--- a/include/asm-arm/arch-iop32x/irqs.h
+++ b/include/asm-arm/arch-iop32x/irqs.h
@@ -15,46 +15,36 @@
/*
* IOP80321 chipset interrupts
*/
-#define IOP321_IRQ_OFS 0
-#define IOP321_IRQ(x) (IOP321_IRQ_OFS + (x))
+#define IRQ_IOP321_DMA0_EOT 0
+#define IRQ_IOP321_DMA0_EOC 1
+#define IRQ_IOP321_DMA1_EOT 2
+#define IRQ_IOP321_DMA1_EOC 3
+#define IRQ_IOP321_AA_EOT 6
+#define IRQ_IOP321_AA_EOC 7
+#define IRQ_IOP321_CORE_PMON 8
+#define IRQ_IOP321_TIMER0 9
+#define IRQ_IOP321_TIMER1 10
+#define IRQ_IOP321_I2C_0 11
+#define IRQ_IOP321_I2C_1 12
+#define IRQ_IOP321_MESSAGING 13
+#define IRQ_IOP321_ATU_BIST 14
+#define IRQ_IOP321_PERFMON 15
+#define IRQ_IOP321_CORE_PMU 16
+#define IRQ_IOP321_BIU_ERR 17
+#define IRQ_IOP321_ATU_ERR 18
+#define IRQ_IOP321_MCU_ERR 19
+#define IRQ_IOP321_DMA0_ERR 20
+#define IRQ_IOP321_DMA1_ERR 21
+#define IRQ_IOP321_AA_ERR 23
+#define IRQ_IOP321_MSG_ERR 24
+#define IRQ_IOP321_SSP 25
+#define IRQ_IOP321_XINT0 27
+#define IRQ_IOP321_XINT1 28
+#define IRQ_IOP321_XINT2 29
+#define IRQ_IOP321_XINT3 30
+#define IRQ_IOP321_HPI 31
-/*
- * On IRQ or FIQ register
- */
-#define IRQ_IOP321_DMA0_EOT IOP321_IRQ(0)
-#define IRQ_IOP321_DMA0_EOC IOP321_IRQ(1)
-#define IRQ_IOP321_DMA1_EOT IOP321_IRQ(2)
-#define IRQ_IOP321_DMA1_EOC IOP321_IRQ(3)
-#define IRQ_IOP321_RSVD_4 IOP321_IRQ(4)
-#define IRQ_IOP321_RSVD_5 IOP321_IRQ(5)
-#define IRQ_IOP321_AA_EOT IOP321_IRQ(6)
-#define IRQ_IOP321_AA_EOC IOP321_IRQ(7)
-#define IRQ_IOP321_CORE_PMON IOP321_IRQ(8)
-#define IRQ_IOP321_TIMER0 IOP321_IRQ(9)
-#define IRQ_IOP321_TIMER1 IOP321_IRQ(10)
-#define IRQ_IOP321_I2C_0 IOP321_IRQ(11)
-#define IRQ_IOP321_I2C_1 IOP321_IRQ(12)
-#define IRQ_IOP321_MESSAGING IOP321_IRQ(13)
-#define IRQ_IOP321_ATU_BIST IOP321_IRQ(14)
-#define IRQ_IOP321_PERFMON IOP321_IRQ(15)
-#define IRQ_IOP321_CORE_PMU IOP321_IRQ(16)
-#define IRQ_IOP321_BIU_ERR IOP321_IRQ(17)
-#define IRQ_IOP321_ATU_ERR IOP321_IRQ(18)
-#define IRQ_IOP321_MCU_ERR IOP321_IRQ(19)
-#define IRQ_IOP321_DMA0_ERR IOP321_IRQ(20)
-#define IRQ_IOP321_DMA1_ERR IOP321_IRQ(21)
-#define IRQ_IOP321_RSVD_22 IOP321_IRQ(22)
-#define IRQ_IOP321_AA_ERR IOP321_IRQ(23)
-#define IRQ_IOP321_MSG_ERR IOP321_IRQ(24)
-#define IRQ_IOP321_SSP IOP321_IRQ(25)
-#define IRQ_IOP321_RSVD_26 IOP321_IRQ(26)
-#define IRQ_IOP321_XINT0 IOP321_IRQ(27)
-#define IRQ_IOP321_XINT1 IOP321_IRQ(28)
-#define IRQ_IOP321_XINT2 IOP321_IRQ(29)
-#define IRQ_IOP321_XINT3 IOP321_IRQ(30)
-#define IRQ_IOP321_HPI IOP321_IRQ(31)
-
-#define NR_IRQS (IOP321_IRQ(31) + 1)
+#define NR_IRQS 32
/*