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authorLinus Torvalds <torvalds@g5.osdl.org>2005-11-01 21:32:14 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2005-11-01 21:32:14 -0800
commit7f36b1e9582c06d0ddef5f2416c9b17017647d1f (patch)
treef83cbcef623476b9b8a14f7a0cc66eb92552a651 /include/asm-arm/arch-ixp2000/system.h
parent0e016b9fa134d79341cca5e336ccbcea066d5f81 (diff)
parent73ee723e4c6d179c2e9496cc4caf160a18d95603 (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
Diffstat (limited to 'include/asm-arm/arch-ixp2000/system.h')
-rw-r--r--include/asm-arm/arch-ixp2000/system.h23
1 files changed, 9 insertions, 14 deletions
diff --git a/include/asm-arm/arch-ixp2000/system.h b/include/asm-arm/arch-ixp2000/system.h
index 4f489cc0dfa5..ddbbb34b5f95 100644
--- a/include/asm-arm/arch-ixp2000/system.h
+++ b/include/asm-arm/arch-ixp2000/system.h
@@ -26,29 +26,24 @@ static inline void arch_reset(char mode)
* RedBoot bank.
*/
if (machine_is_ixdp2401()) {
- *IXDP2X01_CPLD_FLASH_REG = ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
- | IXDP2X01_CPLD_FLASH_INTERN);
- *IXDP2X01_CPLD_RESET_REG = 0xffffffff;
+ ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
+ ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
+ | IXDP2X01_CPLD_FLASH_INTERN));
+ ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
}
/*
* On IXDP2801 we need to write this magic sequence to the CPLD
* to cause a complete reset of the CPU and all external devices
- * and moves the flash bank register back to 0.
+ * and move the flash bank register back to 0.
*/
if (machine_is_ixdp2801()) {
unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
+
reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
- *IXDP2X01_CPLD_RESET_REG = reset_reg;
- mb();
- *IXDP2X01_CPLD_RESET_REG = 0x80000000;
+ ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
+ ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
}
- /*
- * We do a reset all if we are PCI master. We could be a slave and we
- * don't want to do anything funky on the PCI bus.
- */
- if (*IXP2000_STRAP_OPTIONS & CFG_PCI_BOOT_HOST) {
- *(IXP2000_RESET0) |= (RSTALL);
- }
+ ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
}