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authorMichael-Luke Jones <mlj28@cam.ac.uk>2007-05-23 22:41:53 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-26 10:09:39 +0100
commitcc50a0df51e4f2a7982ade338b3d74825ca67e08 (patch)
tree2c45b932542678b7f51911edd1bbff006527c22b /include/asm-arm/arch-ixp4xx
parent435c5da00b9610f9664c5d6f38dfdafce419ef4a (diff)
[ARM] 4406/1: Trivial NSLU2 / NAS-100D header & setup code cleanup
This trivial patch updates the nslu2 and nas-100d headers to remove pointless GPIO defines, and updates nslu2-setup.c accordingly. In addition minor style cleanups to some comments are included. Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ixp4xx')
-rw-r--r--include/asm-arm/arch-ixp4xx/nas100d.h28
-rw-r--r--include/asm-arm/arch-ixp4xx/nslu2.h46
2 files changed, 16 insertions, 58 deletions
diff --git a/include/asm-arm/arch-ixp4xx/nas100d.h b/include/asm-arm/arch-ixp4xx/nas100d.h
index 84467a5190d0..131e0a1d0df3 100644
--- a/include/asm-arm/arch-ixp4xx/nas100d.h
+++ b/include/asm-arm/arch-ixp4xx/nas100d.h
@@ -10,7 +10,7 @@
* based on ixdp425.h:
* Copyright 2004 (c) MontaVista, Software, Inc.
*
- * This file is licensed under the terms of the GNU General Public
+ * This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
@@ -36,31 +36,11 @@
#define NAS100D_PCI_INTD_PIN 8
#define NAS100D_PCI_INTE_PIN 7
-/* GPIO */
-
-#define NAS100D_GPIO0 0
-#define NAS100D_GPIO1 1
-#define NAS100D_GPIO2 2
-#define NAS100D_GPIO3 3
-#define NAS100D_GPIO4 4
-#define NAS100D_GPIO5 5
-#define NAS100D_GPIO6 6
-#define NAS100D_GPIO7 7
-#define NAS100D_GPIO8 8
-#define NAS100D_GPIO9 9
-#define NAS100D_GPIO10 10
-#define NAS100D_GPIO11 11
-#define NAS100D_GPIO12 12
-#define NAS100D_GPIO13 13
-#define NAS100D_GPIO14 14
-#define NAS100D_GPIO15 15
-
-
/* Buttons */
-#define NAS100D_PB_GPIO NAS100D_GPIO14
-#define NAS100D_RB_GPIO NAS100D_GPIO4
-#define NAS100D_PO_GPIO NAS100D_GPIO12 /* power off */
+#define NAS100D_PB_GPIO 14
+#define NAS100D_RB_GPIO 4
+#define NAS100D_PO_GPIO 12 /* power off */
#define NAS100D_PB_IRQ IRQ_IXP4XX_GPIO14
#define NAS100D_RB_IRQ IRQ_IXP4XX_GPIO4
diff --git a/include/asm-arm/arch-ixp4xx/nslu2.h b/include/asm-arm/arch-ixp4xx/nslu2.h
index 6b437f7c9955..850fdc5b45da 100644
--- a/include/asm-arm/arch-ixp4xx/nslu2.h
+++ b/include/asm-arm/arch-ixp4xx/nslu2.h
@@ -9,7 +9,7 @@
* based on ixdp425.h:
* Copyright 2004 (c) MontaVista, Software, Inc.
*
- * This file is licensed under the terms of the GNU General Public
+ * This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
@@ -34,36 +34,14 @@
#define NSLU2_PCI_INTC_PIN 9
#define NSLU2_PCI_INTD_PIN 8
-
/* NSLU2 Timer */
#define NSLU2_FREQ 66000000
-#define NSLU2_CLOCK_TICK_RATE (((NSLU2_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
-#define NSLU2_CLOCK_TICKS_PER_USEC ((NSLU2_CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC)
-
-/* GPIO */
-
-#define NSLU2_GPIO0 0
-#define NSLU2_GPIO1 1
-#define NSLU2_GPIO2 2
-#define NSLU2_GPIO3 3
-#define NSLU2_GPIO4 4
-#define NSLU2_GPIO5 5
-#define NSLU2_GPIO6 6
-#define NSLU2_GPIO7 7
-#define NSLU2_GPIO8 8
-#define NSLU2_GPIO9 9
-#define NSLU2_GPIO10 10
-#define NSLU2_GPIO11 11
-#define NSLU2_GPIO12 12
-#define NSLU2_GPIO13 13
-#define NSLU2_GPIO14 14
-#define NSLU2_GPIO15 15
/* Buttons */
-#define NSLU2_PB_GPIO NSLU2_GPIO5
-#define NSLU2_PO_GPIO NSLU2_GPIO8 /* power off */
-#define NSLU2_RB_GPIO NSLU2_GPIO12
+#define NSLU2_PB_GPIO 5
+#define NSLU2_PO_GPIO 8 /* power off */
+#define NSLU2_RB_GPIO 12
#define NSLU2_PB_IRQ IRQ_IXP4XX_GPIO5
#define NSLU2_RB_IRQ IRQ_IXP4XX_GPIO12
@@ -79,16 +57,16 @@
/* LEDs */
-#define NSLU2_LED_RED NSLU2_GPIO0
-#define NSLU2_LED_GRN NSLU2_GPIO1
+#define NSLU2_LED_RED_GPIO 0
+#define NSLU2_LED_GRN_GPIO 1
-#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED)
-#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN)
+#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED_GPIO)
+#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN_GPIO)
-#define NSLU2_LED_DISK1 NSLU2_GPIO3
-#define NSLU2_LED_DISK2 NSLU2_GPIO2
+#define NSLU2_LED_DISK1_GPIO 3
+#define NSLU2_LED_DISK2_GPIO 2
-#define NSLU2_LED_DISK1_BM (1L << NSLU2_GPIO2)
-#define NSLU2_LED_DISK2_BM (1L << NSLU2_GPIO3)
+#define NSLU2_LED_DISK1_BM (1L << NSLU2_LED_DISK1_GPIO)
+#define NSLU2_LED_DISK2_BM (1L << NSLU2_LED_DISK2_GPIO)