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authorSaeed Bishara <saeed@marvell.com>2008-06-23 01:05:08 -1100
committerNicolas Pitre <nico@cam.org>2008-06-30 14:25:24 -0400
commit1338760329c586e0141831099e15f5c336dd9c1d (patch)
treecf7b223ee87d0686118ac8b6a3214656aa69279a /include/asm-arm/arch-kirkwood
parenta10b188f195d00116f56f0049d8b17c711641fb7 (diff)
[ARM] Kirkwood: support L2 writeback mode
This patch allows booting Kirkwood with the L2 in writeback mode, by reading the WT override bit from the L2 config register and passing that into the Feroceon L2 init routine, instead of assuming that the WT override bit will always be set Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Diffstat (limited to 'include/asm-arm/arch-kirkwood')
-rw-r--r--include/asm-arm/arch-kirkwood/kirkwood.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/asm-arm/arch-kirkwood/kirkwood.h b/include/asm-arm/arch-kirkwood/kirkwood.h
index 520250dbd8a3..bb31b315c350 100644
--- a/include/asm-arm/arch-kirkwood/kirkwood.h
+++ b/include/asm-arm/arch-kirkwood/kirkwood.h
@@ -49,7 +49,6 @@
#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104)
#define CPU_RESET 0x00000002
-//#define L2_WRITETHROUGH 0x00020000
#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
#define SOFT_RESET_OUT_EN 0x00000004
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
@@ -65,6 +64,8 @@
#define IRQ_CAUSE_HIGH_OFF 0x0010
#define IRQ_MASK_HIGH_OFF 0x0014
#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
+#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128)
+#define L2_WRITETHROUGH 0x00000010
/*
* Register Map