diff options
author | Len Brown <len.brown@intel.com> | 2006-01-27 17:18:29 -0500 |
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committer | Len Brown <len.brown@intel.com> | 2006-01-27 17:18:29 -0500 |
commit | 292dd876ee765c478b27c93cc51e93a558ed58bf (patch) | |
tree | 5b740e93253295baee2a9c414a6c66d03d44a9ef /include/asm-arm/system.h | |
parent | d4ec6c7cc9a15a7a529719bc3b84f46812f9842e (diff) | |
parent | 9fdb62af92c741addbea15545f214a6e89460865 (diff) |
Pull release into acpica branch
Diffstat (limited to 'include/asm-arm/system.h')
-rw-r--r-- | include/asm-arm/system.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index 5621d61ebc07..eb2de8c10515 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -168,10 +168,20 @@ extern struct task_struct *__switch_to(struct task_struct *, struct thread_info #define switch_to(prev,next,last) \ do { \ - last = __switch_to(prev,prev->thread_info,next->thread_info); \ + last = __switch_to(prev,task_thread_info(prev), task_thread_info(next)); \ } while (0) /* + * On SMP systems, when the scheduler does migration-cost autodetection, + * it needs a way to flush as much of the CPU's caches as possible. + * + * TODO: fill this in! + */ +static inline void sched_cacheflush(void) +{ +} + +/* * CPU interrupt mask handling. */ #if __LINUX_ARM_ARCH__ >= 6 |