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authoreric miao <eric.y.miao@gmail.com>2007-11-20 01:34:04 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-11-26 14:38:46 +0000
commita8929198563c48544cc0cee0565be7d6629a2a4e (patch)
tree3e46527acc8a568b73b1532e6f75fa11395ff6e3 /include/asm-arm
parent2ffbb8377c7a0713baf6644e285adc27a5654582 (diff)
[ARM] 4651/1: pxa: add PXA3xx specific IRQ definitions
add missing IRQ_xxx definitions for PXA3xx Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-pxa/irqs.h19
1 files changed, 17 insertions, 2 deletions
diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h
index 6238dbf7a236..1c762078424e 100644
--- a/include/asm-arm/arch-pxa/irqs.h
+++ b/include/asm-arm/arch-pxa/irqs.h
@@ -13,7 +13,7 @@
#define PXA_IRQ(x) (x)
-#ifdef CONFIG_PXA27x
+#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */
#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */
#define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */
@@ -52,11 +52,26 @@
#define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */
#define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */
-#ifdef CONFIG_PXA27x
+#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
#define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */
#define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */
#endif
+#ifdef CONFIG_PXA3xx
+#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */
+#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */
+#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */
+#define IRQ_GRPHICS PXA_IRQ(39) /* Graphics Controller */
+#define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */
+#define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */
+#define IRQ_NAND PXA_IRQ(45) /* NAND Controller */
+#define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */
+#define IRQ_WAKEUP0 PXA_IRQ(49) /* EXT_WAKEUP0 */
+#define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */
+#define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */
+#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */
+#endif
+
#define PXA_GPIO_IRQ_BASE (64)
#define PXA_GPIO_IRQ_NUM (128)