Blackfin arch: defines and provides entry points for certain user space functions at fixed addresses

This patch defines (and provides) entry points for certain user space functions
at fixed addresses.  The Blackfin has no usable atomic instructions, but we can
ensure that these code sequences appear atomic from a user space point of view
by detecting when we're in the process of executing them during the interrupt
handler return path.  This allows much more efficient pthread lock
implementations than the bfin_spinlock syscall we're currently using.

Also provided is a small sys_rt_sigreturn stub which can be used by the signal
handler setup code.  The signal.c part will be committed separately.

Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>

1 files changed, 12 insertions, 0 deletions

diff --git a/include/asm-blackfin/bfin-global.h b/include/asm-blackfin/bfin-global.h
index 57f37ccdcdf1..c4d6cbbf96d4 100644
--- a/include/asm-blackfin/bfin-global.h
+++ b/include/asm-blackfin/bfin-global.h
@@ -67,6 +67,18 @@ extern void evt14_softirq(void);
 extern asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs);
 extern void bfin_gpio_interrupt_setup(int irq, int irq_pfx, int type);
 
+extern asmlinkage void finish_atomic_sections (struct pt_regs *regs);
+extern char fixed_code_start;
+extern char fixed_code_end;
+extern int atomic_xchg32(void);
+extern int atomic_cas32(void);
+extern int atomic_add32(void);
+extern int atomic_sub32(void);
+extern int atomic_ior32(void);
+extern int atomic_and32(void);
+extern int atomic_xor32(void);
+extern void sigreturn_stub(void);
+
 extern void *l1_data_A_sram_alloc(size_t);
 extern void *l1_data_B_sram_alloc(size_t);
 extern void *l1_inst_sram_alloc(size_t);