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author | Ingo Molnar <mingo@elte.hu> | 2008-06-25 12:32:01 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-06-25 12:32:01 +0200 |
commit | da7878d75b8520c9ae00d27dfbbce546a7bfdfbb (patch) | |
tree | 547fd497a80818a60ac36831377d5df97868173c /include/asm-blackfin/mach-bf527/anomaly.h | |
parent | 0e50a4c6ab94ffe7e5515b86b5df9e5abc8c6b13 (diff) | |
parent | 543cf4cb3fe6f6cae3651ba918b9c56200b257d0 (diff) |
Merge branch 'linus' into x86/pebstip-x86-pebs-2008-06-25_10.32_Wed
Diffstat (limited to 'include/asm-blackfin/mach-bf527/anomaly.h')
-rw-r--r-- | include/asm-blackfin/mach-bf527/anomaly.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/asm-blackfin/mach-bf527/anomaly.h b/include/asm-blackfin/mach-bf527/anomaly.h index 735fa02fafb2..4725268a5ada 100644 --- a/include/asm-blackfin/mach-bf527/anomaly.h +++ b/include/asm-blackfin/mach-bf527/anomaly.h @@ -15,12 +15,16 @@ /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */ #define ANOMALY_05000074 (1) +/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ +#define ANOMALY_05000119 (1) /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ #define ANOMALY_05000122 (1) /* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */ #define ANOMALY_05000245 (1) /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ #define ANOMALY_05000265 (1) +/* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ +#define ANOMALY_05000312 (1) /* Incorrect Access of OTP_STATUS During otp_write() Function */ #define ANOMALY_05000328 (1) /* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */ @@ -92,7 +96,6 @@ #define ANOMALY_05000266 (0) #define ANOMALY_05000273 (0) #define ANOMALY_05000311 (0) -#define ANOMALY_05000312 (0) #define ANOMALY_05000323 (0) #define ANOMALY_05000363 (0) |