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| author | Ingo Molnar <mingo@elte.hu> | 2008-06-16 11:23:36 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-06-16 11:23:36 +0200 |
| commit | 766d02786ecd22932beeb9ca8bad6d8c5a552ef9 (patch) | |
| tree | f6f2df0e35bbea914d1f4d12be6d02f128c73575 /include/asm-blackfin/mach-bf527/anomaly.h | |
| parent | 906d882cacecd37ad2fdd03ed2a9b232bcb9507e (diff) | |
| parent | 066519068ad2fbe98c7f45552b1f592903a9c8c8 (diff) | |
Merge branch 'linus' into core/rcutip-core-rcu-2008-06-16_09.23_Mon
Diffstat (limited to 'include/asm-blackfin/mach-bf527/anomaly.h')
| -rw-r--r-- | include/asm-blackfin/mach-bf527/anomaly.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/asm-blackfin/mach-bf527/anomaly.h b/include/asm-blackfin/mach-bf527/anomaly.h index 735fa02fafb2..4725268a5ada 100644 --- a/include/asm-blackfin/mach-bf527/anomaly.h +++ b/include/asm-blackfin/mach-bf527/anomaly.h @@ -15,12 +15,16 @@ /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */ #define ANOMALY_05000074 (1) +/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ +#define ANOMALY_05000119 (1) /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */ #define ANOMALY_05000122 (1) /* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */ #define ANOMALY_05000245 (1) /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ #define ANOMALY_05000265 (1) +/* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ +#define ANOMALY_05000312 (1) /* Incorrect Access of OTP_STATUS During otp_write() Function */ #define ANOMALY_05000328 (1) /* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */ @@ -92,7 +96,6 @@ #define ANOMALY_05000266 (0) #define ANOMALY_05000273 (0) #define ANOMALY_05000311 (0) -#define ANOMALY_05000312 (0) #define ANOMALY_05000323 (0) #define ANOMALY_05000363 (0) |