diff options
| author | Roy Huang <roy.huang@analog.com> | 2007-06-21 11:34:16 +0800 |
|---|---|---|
| committer | Bryan Wu <bryan.wu@analog.com> | 2007-06-21 11:34:16 +0800 |
| commit | 088eec1192a0ae60fc218796027e622008af36c0 (patch) | |
| tree | 35f1e386c4074ee5f01d7ff57e9ab4c19a9de710 /include/asm-blackfin/mach-bf548/dma.h | |
| parent | 4eb6bf6bfb580afaf1e1a1d30cba17a078530cf4 (diff) | |
Blackfin arch: Add header files for BF548
Signed-off-by: Roy Huang <roy.huang@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin/mach-bf548/dma.h')
| -rw-r--r-- | include/asm-blackfin/mach-bf548/dma.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf548/dma.h b/include/asm-blackfin/mach-bf548/dma.h new file mode 100644 index 000000000000..5a334c813c79 --- /dev/null +++ b/include/asm-blackfin/mach-bf548/dma.h @@ -0,0 +1,63 @@ +/* + * file: include/asm-blackfin/mach-bf548/dma.h + * based on: + * author: + * + * created: + * description: + * system mmr register map + * rev: + * + * modified: + * + * + * bugs: enter bugs at http://blackfin.uclinux.org/ + * + * this program is free software; you can redistribute it and/or modify + * it under the terms of the gnu general public license as published by + * the free software foundation; either version 2, or (at your option) + * any later version. + * + * this program is distributed in the hope that it will be useful, + * but without any warranty; without even the implied warranty of + * merchantability or fitness for a particular purpose. see the + * gnu general public license for more details. + * + * you should have received a copy of the gnu general public license + * along with this program; see the file copying. + * if not, write to the free software foundation, + * 59 temple place - suite 330, boston, ma 02111-1307, usa. + */ + +#ifndef _MACH_DMA_H_ +#define _MACH_DMA_H_ + +#define CH_SPORT0_RX 0 +#define CH_SPORT0_TX 1 +#define CH_SPORT1_RX 2 +#define CH_SPORT1_TX 3 +#define CH_SPI0 4 +#define CH_SPI1 5 +#define CH_UART0_RX 6 +#define CH_UART0_TX 7 +#define CH_UART1_RX 8 +#define CH_UART1_TX 9 +#define CH_ATAPI_RX 10 +#define CH_ATAPI_TX 11 + +#define CH_EPPI0 12 +#define CH_EPPI1 13 +#define CH_EPPI2 14 +#define CH_PIXC_IMAGE 15 +#define CH_PIXC_OVERLAY 16 +#define CH_PIXC_OUTPUT 17 +#define CH_SPORT2_RX 18 +#define CH_SPORT2_TX 19 +#define CH_SPORT3_RX 20 +#define CH_SPORT3_TX 21 +#define CH_SDH 22 +#define CH_SPI2 23 + +#define MAX_BLACKFIN_DMA_CHANNEL CH_SPI2 + +#endif |