diff options
author | Mike Frysinger <michael.frysinger@analog.com> | 2007-06-11 17:47:27 +0800 |
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committer | Bryan Wu <bryan.wu@analog.com> | 2007-06-11 17:47:27 +0800 |
commit | df30b1171714bbf0e55ffe02138be4b8447e4235 (patch) | |
tree | 82241675e05ee5053cb748662950c2a41e9abee2 /include/asm-blackfin | |
parent | de6a9520d4c799ce2079c59457b06251367e67b6 (diff) |
Blackfin arch: move HI/LO macros into blackfin.h and punt the rest of macros.h as it includes VDSP macros we never use
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin')
-rw-r--r-- | include/asm-blackfin/blackfin.h | 6 | ||||
-rw-r--r-- | include/asm-blackfin/macros.h | 95 |
2 files changed, 5 insertions, 96 deletions
diff --git a/include/asm-blackfin/blackfin.h b/include/asm-blackfin/blackfin.h index 14e58de73973..db3b615ffbab 100644 --- a/include/asm-blackfin/blackfin.h +++ b/include/asm-blackfin/blackfin.h @@ -6,7 +6,11 @@ #ifndef _BLACKFIN_H_ #define _BLACKFIN_H_ -#include <asm/macros.h> +#define LO(con32) ((con32) & 0xFFFF) +#define lo(con32) ((con32) & 0xFFFF) +#define HI(con32) (((con32) >> 16) & 0xFFFF) +#define hi(con32) (((con32) >> 16) & 0xFFFF) + #include <asm/mach/blackfin.h> #include <asm/bfin-global.h> diff --git a/include/asm-blackfin/macros.h b/include/asm-blackfin/macros.h index c0c04a2f2dd5..e69de29bb2d1 100644 --- a/include/asm-blackfin/macros.h +++ b/include/asm-blackfin/macros.h @@ -1,95 +0,0 @@ -/************************************************************************ - * - * macros.h - * - * (c) Copyright 2001-2003 Analog Devices, Inc. All rights reserved. - * - ************************************************************************/ - -/* Defines various assembly macros. */ - -#ifndef _MACROS_H -#define _MACROS_H - -#define LO(con32) ((con32) & 0xFFFF) -#define lo(con32) ((con32) & 0xFFFF) -#define HI(con32) (((con32) >> 16) & 0xFFFF) -#define hi(con32) (((con32) >> 16) & 0xFFFF) - -/* - * Set the corresponding bits in a System Register (SR); - * All bits set in "mask" will be set in the system register - * specified by "sys_reg" bitset_SR(sys_reg, mask), where - * sys_reg is the system register and mask are the bits to be set. - */ -#define bitset_SR(sys_reg, mask)\ - [--SP] = (R7:6);\ - r7 = sys_reg;\ - r6.l = (mask) & 0xffff;\ - r6.h = (mask) >> 16;\ - r7 = r7 | r6;\ - sys_reg = r7;\ - csync;\ - (R7:6) = [SP++] - -/* - * Clear the corresponding bits in a System Register (SR); - * All bits set in "mask" will be cleared in the SR - * specified by "sys_reg" bitclr_SR(sys_reg, mask), where - * sys_reg is the SR and mask are the bits to be cleared. - */ -#define bitclr_SR(sys_reg, mask)\ - [--SP] = (R7:6);\ - r7 = sys_reg;\ - r7 =~ r7;\ - r6.l = (mask) & 0xffff;\ - r6.h = (mask) >> 16;\ - r7 = r7 | r6;\ - r7 =~ r7;\ - sys_reg = r7;\ - csync;\ - (R7:6) = [SP++] - -/* - * Set the corresponding bits in a Memory Mapped Register (MMR); - * All bits set in "mask" will be set in the MMR specified by "mmr_reg" - * bitset_MMR(mmr_reg, mask), where mmr_reg is the MMR and mask are - * the bits to be set. - */ -#define bitset_MMR(mmr_reg, mask)\ - [--SP] = (R7:6);\ - [--SP] = P5;\ - p5.l = mmr_reg & 0xffff;\ - p5.h = mmr_reg >> 16;\ - r7 = [p5];\ - r6.l = (mask) & 0xffff;\ - r6.h = (mask) >> 16;\ - r7 = r7 | r6;\ - [p5] = r7;\ - csync;\ - p5 = [SP++];\ - (R7:6) = [SP++] - -/* - * Clear the corresponding bits in a Memory Mapped Register (MMR); - * All bits set in "mask" will be cleared in the MMR specified by "mmr_reg" - * bitclr_MMRreg(mmr_reg, mask), where sys_reg is the MMR and mask are - * the bits to be cleared. - */ -#define bitclr_MMR(mmr_reg, mask)\ - [--SP] = (R7:6);\ - [--SP] = P5;\ - p5.l = mmr_reg & 0xffff;\ - p5.h = mmr_reg >> 16;\ - r7 = [p5];\ - r7 =~ r7;\ - r6.l = (mask) & 0xffff;\ - r6.h = (mask) >> 16;\ - r7 = r7 | r6;\ - r7 =~ r7;\ - [p5] = r7;\ - csync;\ - p5 = [SP++];\ - (R7:6) = [SP++] - -#endif /* _MACROS_H */ |