diff options
| author | Aurelien Jarno <aurelien@aurel32.net> | 2007-09-25 15:40:12 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 23:46:02 +0100 |
| commit | 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 (patch) | |
| tree | a274a6e2e56f519900fb35c544ddf279f38ca8d6 /include/asm-mips/cpu.h | |
| parent | ea202c632a52c4a83f1bd82d8d06bc8e04f2689a (diff) | |
[MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/cpu.h')
| -rw-r--r-- | include/asm-mips/cpu.h | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index 3857358fb6de..d67f43b09964 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -106,6 +106,13 @@ #define PRID_IMP_SR71000 0x0400 /* + * These are the PRID's for when 23:16 == PRID_COMP_BROADCOM + */ + +#define PRID_IMP_BCM4710 0x4000 +#define PRID_IMP_BCM3302 0x9000 + +/* * Definitions for 7:0 on legacy processors */ @@ -217,8 +224,9 @@ #define CPU_R14000 64 #define CPU_LOONGSON1 65 #define CPU_LOONGSON2 66 - -#define CPU_LAST 66 +#define CPU_BCM3302 67 +#define CPU_BCM4710 68 +#define CPU_LAST 68 /* * ISA Level encodings |