Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (21 commits)
  [MIPS] Remove unused maltasmp.h.
  [MIPS] Remove unused saa9730_uart.h.
  [MIPS] Rename MIPS sys_pipe syscall entry point to something MIPS-specific.
  [MIPS] 32-bit compat: Delete unused sys_truncate64 and sys_ftruncate64.
  [MIPS] TXx9: Fix some sparse warnings
  [MIPS] TXx9: Add 64-bit support
  [MIPS] TXx9: Cleanups for 64-bit support
  [MIPS] Cobalt: Fix I/O port resource range
  [MIPS] don't leak setup_early_printk() in userspace header
  [MIPS] Remove include/asm-mips/mips-boards/sead{,int}.h
  [MIPS] Remove asm-mips/mips-boards/atlas{,int}.h
  [MIPS] mips/sgi-ip22/ip28-berr.c: fix the build
  [MIPS] TXx9: Miscellaneous build fixes
  [MIPS] Routerboard 532: Support for base system
  [MIPS] IP32: Use common SGI button driver
  [MIPS] IP22: Use common SGI button driver
  [MIPS] IP22, IP28: Fix merge bug
  [MIPS] Tinker with constraints in <asm/atomic.h> to fix build error.
  [MIPS] Add missing prototypes to asm/page.h
  [MIPS] Fix missing prototypes in asm/fpu.h
  ...

1 files changed, 61 insertions, 0 deletions

diff --git a/include/asm-mips/mach-rc32434/rc32434.h b/include/asm-mips/mach-rc32434/rc32434.h
new file mode 100644
index 000000000000..c4a02145104e
--- /dev/null
+++ b/include/asm-mips/mach-rc32434/rc32434.h
@@ -0,0 +1,61 @@
+/*
+ * Definitions for IDT RC323434 CPU.
+ */
+
+#ifndef _ASM_RC32434_RC32434_H_
+#define _ASM_RC32434_RC32434_H_
+
+#include <linux/delay.h>
+#include <linux/io.h>
+
+#define RC32434_REG_BASE	0x18000000
+#define RC32434_RST		(1 << 15)
+
+#define IDT_CLOCK_MULT		2
+#define MIPS_CPU_TIMER_IRQ	7
+
+/* Interrupt Controller */
+#define IC_GROUP0_PEND		(RC32434_REG_BASE + 0x38000)
+#define IC_GROUP0_MASK		(RC32434_REG_BASE + 0x38008)
+#define IC_GROUP_OFFSET		0x0C
+
+#define NUM_INTR_GROUPS		5
+
+/* 16550 UARTs */
+#define GROUP0_IRQ_BASE		8	/* GRP2 IRQ numbers start here */
+					/* GRP3 IRQ numbers start here */
+#define GROUP1_IRQ_BASE		(GROUP0_IRQ_BASE + 32)
+					/* GRP4 IRQ numbers start here */
+#define GROUP2_IRQ_BASE		(GROUP1_IRQ_BASE + 32)
+					/* GRP5 IRQ numbers start here */
+#define GROUP3_IRQ_BASE		(GROUP2_IRQ_BASE + 32)
+#define GROUP4_IRQ_BASE		(GROUP3_IRQ_BASE + 32)
+
+
+#ifdef __MIPSEB__
+#define RC32434_UART0_BASE	(RC32434_REG_BASE + 0x58003)
+#else
+#define RC32434_UART0_BASE	(RC32434_REG_BASE + 0x58000)
+#endif
+
+#define RC32434_UART0_IRQ	(GROUP3_IRQ_BASE + 0)
+
+/* cpu pipeline flush */
+static inline void rc32434_sync(void)
+{
+	__asm__ volatile ("sync");
+}
+
+static inline void rc32434_sync_udelay(int us)
+{
+	__asm__ volatile ("sync");
+	udelay(us);
+}
+
+static inline void rc32434_sync_delay(int ms)
+{
+	__asm__ volatile ("sync");
+	mdelay(ms);
+}
+
+#endif  /* _ASM_RC32434_RC32434_H_ */