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author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-28 10:51:43 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-28 10:51:43 -0700 |
commit | e31a94ed371c70855eb30b77c490d6d85dd4da26 (patch) | |
tree | 58d9f1a75a22319f97731db8d9ac07b78a8d8aaf /include/asm-mips/mips-boards/launch.h | |
parent | 9d9ad4b51d2b29b5bbeb4011f5e76f7538119cf9 (diff) | |
parent | fcbd3b4b92efe29b59df16b910138cf43683be88 (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (45 commits)
[MIPS] Pb1200/DBAu1200: move platform code to its proper place
[MIPS] Fix handling of trap and breakpoint instructions
[MIPS] Pb1200: do register SMC 91C111
[MIPS] DBAu1200: fix bad SMC 91C111 resource size
[NET] Kconfig: Rename MIKROTIK_RB500 -> MIKROTIK_RB532
[MIPS] IP27: Fix build bug due to missing include
[MIPS] Fix some sparse warnings on traps.c and irq-msc01.c
[MIPS] cevt-gt641xx: Kill unnecessary include
[MIPS] DS1287: Add clockevent driver
[MIPS] add DECstation I/O ASIC clocksource
[MIPS] rbtx4938: minor cleanup
[MIPS] Alchemy: kill unused PCI_IRQ_TABLE_LOOKUP macro
[MIPS] rbtx4938: misc cleanups
[MIPS] jmr3927: use generic txx9 gpio
[MIPS] rbhma4500: use generic txx9 gpio
[MIPS] generic txx9 gpio support
[MIPS] make fallback gpio.h gpiolib-friendly
[MIPS] unexport null_perf_irq() and make it static
[MIPS] unexport rtc_mips_set_time()
[MIPS] unexport copy_from_user_page()
...
Diffstat (limited to 'include/asm-mips/mips-boards/launch.h')
-rw-r--r-- | include/asm-mips/mips-boards/launch.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/include/asm-mips/mips-boards/launch.h b/include/asm-mips/mips-boards/launch.h new file mode 100644 index 000000000000..d8ae7f95a522 --- /dev/null +++ b/include/asm-mips/mips-boards/launch.h @@ -0,0 +1,35 @@ +/* + * + */ + +#ifndef _ASSEMBLER_ + +struct cpulaunch { + unsigned long pc; + unsigned long gp; + unsigned long sp; + unsigned long a0; + unsigned long _pad[3]; /* pad to cache line size to avoid thrashing */ + unsigned long flags; +}; + +#else + +#define LOG2CPULAUNCH 5 +#define LAUNCH_PC 0 +#define LAUNCH_GP 4 +#define LAUNCH_SP 8 +#define LAUNCH_A0 12 +#define LAUNCH_FLAGS 28 + +#endif + +#define LAUNCH_FREADY 1 +#define LAUNCH_FGO 2 +#define LAUNCH_FGONE 4 + +#define CPULAUNCH 0x00000f00 +#define NCPULAUNCH 8 + +/* Polling period in count cycles for secondary CPU's */ +#define LAUNCHPERIOD 10000 |