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authorRalf Baechle <ralf@linux-mips.org>2008-05-26 09:35:47 +0100
committerRalf Baechle <ralf@linux-mips.org>2008-06-05 18:13:15 +0100
commit272bace7f3753ea8bf6ee80e3a6b32fa64190744 (patch)
treed3cfd8e5da732341af3f42c9b0e2f727b83e4998 /include/asm-mips/mipsregs.h
parent96173a6c4ebca4c146bb87026cce78bbe392cb61 (diff)
[MIPS] Add accessors for random register.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mipsregs.h')
-rw-r--r--include/asm-mips/mipsregs.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index aa17f658f73c..a46f8e258e6b 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -765,6 +765,9 @@ do { \
#define read_c0_index() __read_32bit_c0_register($0, 0)
#define write_c0_index(val) __write_32bit_c0_register($0, 0, val)
+#define read_c0_random() __read_32bit_c0_register($1, 0)
+#define write_c0_random(val) __write_32bit_c0_register($1, 0, val)
+
#define read_c0_entrylo0() __read_ulong_c0_register($2, 0)
#define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val)