diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2005-10-07 16:58:15 +0100 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 19:32:37 +0100 |
commit | ec917c2c1ab4359a1d438e62daeb50cc42e632e1 (patch) | |
tree | deb2e00bee354577e1f19b7b70c1a2037828a957 /include/asm-mips | |
parent | f92c1759a40a85f52b835c21b0ef6ce556b340c5 (diff) |
Fixup a few lose ends in explicit support for MIPS R1/R2.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r-- | include/asm-mips/addrspace.h | 2 | ||||
-rw-r--r-- | include/asm-mips/bitops.h | 54 | ||||
-rw-r--r-- | include/asm-mips/hazards.h | 2 | ||||
-rw-r--r-- | include/asm-mips/interrupt.h | 11 | ||||
-rw-r--r-- | include/asm-mips/mach-mips/cpu-feature-overrides.h | 4 | ||||
-rw-r--r-- | include/asm-mips/page.h | 2 |
6 files changed, 37 insertions, 38 deletions
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index 7abdb926faf1..16c1c08d0a03 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -131,7 +131,7 @@ || defined (CONFIG_CPU_R5000) \ || defined (CONFIG_CPU_NEVADA) \ || defined (CONFIG_CPU_TX49XX) \ - || defined (CONFIG_CPU_MIPS64_R1) + || defined (CONFIG_CPU_MIPS64) #define KUSIZE _LLCONST_(0x0000010000000000) /* 2^^40 */ #define KUSIZE_64 _LLCONST_(0x0000010000000000) /* 2^^40 */ #define K0SIZE _LLCONST_(0x0000001000000000) /* 2^^36 */ diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index 2ba20730a3e5..5496f9064a6a 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h @@ -12,6 +12,7 @@ #include <linux/config.h> #include <linux/compiler.h> #include <linux/types.h> +#include <asm/bug.h> #include <asm/byteorder.h> /* sigh ... */ #include <asm/cpu-features.h> @@ -546,33 +547,27 @@ static inline int test_bit(unsigned long nr, const volatile unsigned long *addr) return 1UL & (addr[nr >> SZLONG_LOG] >> (nr & SZLONG_MASK)); } -#ifdef CONFIG_CPU_MIPS32_R1 /* - * Return the bit position (0..31) of the most significant 1 bit in a word + * Return the bit position (0..63) of the most significant 1 bit in a word * Returns -1 if no 1 bit exists */ -static __inline__ int __ilog2(unsigned long x) +static inline int __ilog2(unsigned long x) { int lz; - __asm__ ( - " .set push \n" - " .set mips32 \n" - " clz %0, %1 \n" - " .set pop \n" - : "=r" (lz) - : "r" (x)); + if (sizeof(x) == 4) { + __asm__ ( + " .set push \n" + " .set mips32 \n" + " clz %0, %1 \n" + " .set pop \n" + : "=r" (lz) + : "r" (x)); - return 31 - lz; -} -#elif defined(CONFIG_CPU_MIPS64_R1) -/* - * Return the bit position (0..63) of the most significant 1 bit in a word - * Returns -1 if no 1 bit exists - */ -static __inline__ int __ilog2(unsigned long x) -{ - int lz; + return 31 - lz; + } + + BUG_ON(sizeof(x) != 8); __asm__ ( " .set push \n" @@ -584,7 +579,6 @@ static __inline__ int __ilog2(unsigned long x) return 63 - lz; } -#endif /* * __ffs - find first bit in word. @@ -595,7 +589,7 @@ static __inline__ int __ilog2(unsigned long x) */ static inline unsigned long __ffs(unsigned long word) { -#if defined(CONFIG_CPU_MIPS32_R1) || defined(CONFIG_CPU_MIPS64_R1) +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) return __ilog2(word & -word); #else int b = 0, s; @@ -606,6 +600,8 @@ static inline unsigned long __ffs(unsigned long word) s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s; s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s; s = 1; if (word << 31 != 0) s = 0; b += s; + + return b; #endif #ifdef CONFIG_64BIT s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s; @@ -614,9 +610,10 @@ static inline unsigned long __ffs(unsigned long word) s = 4; if (word << 60 != 0) s = 0; b += s; word >>= s; s = 2; if (word << 62 != 0) s = 0; b += s; word >>= s; s = 1; if (word << 63 != 0) s = 0; b += s; -#endif + return b; #endif +#endif } /* @@ -655,10 +652,10 @@ static inline unsigned long ffz(unsigned long word) */ static inline unsigned long flz(unsigned long word) { -#if defined(CONFIG_CPU_MIPS32_R1) || defined(CONFIG_CPU_MIPS64_R1) +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) return __ilog2(~word); #else -#if defined(CONFIG_32BIT) +#ifdef CONFIG_32BIT int r = 31, s; word = ~word; s = 16; if ((word & 0xffff0000)) s = 0; r -= s; word <<= s; @@ -666,8 +663,10 @@ static inline unsigned long flz(unsigned long word) s = 4; if ((word & 0xf0000000)) s = 0; r -= s; word <<= s; s = 2; if ((word & 0xc0000000)) s = 0; r -= s; word <<= s; s = 1; if ((word & 0x80000000)) s = 0; r -= s; + + return r; #endif -#if defined(CONFIG_64BIT) +#ifdef CONFIG_64BIT int r = 63, s; word = ~word; s = 32; if ((word & 0xffffffff00000000UL)) s = 0; r -= s; word <<= s; @@ -676,9 +675,10 @@ static inline unsigned long flz(unsigned long word) s = 4; if ((word & 0xf000000000000000UL)) s = 0; r -= s; word <<= s; s = 2; if ((word & 0xc000000000000000UL)) s = 0; r -= s; word <<= s; s = 1; if ((word & 0x8000000000000000UL)) s = 0; r -= s; -#endif + return r; #endif +#endif } /* diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index 5250231e936e..7517189e469f 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -232,7 +232,7 @@ __asm__( #endif -#if defined(CONFIG_CPU_MIPS32_R2) || defined (CONFIG_CPU_MIPS64_R2) +#ifdef CONFIG_CPU_MIPSR2 #define instruction_hazard() \ do { \ __label__ __next; \ diff --git a/include/asm-mips/interrupt.h b/include/asm-mips/interrupt.h index 0ba99f019be9..a5735761f5e5 100644 --- a/include/asm-mips/interrupt.h +++ b/include/asm-mips/interrupt.h @@ -19,7 +19,7 @@ __asm__ ( " .set push \n" " .set reorder \n" " .set noat \n" -#if defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2) +#ifdef CONFIG_CPU_MIPSR2 " ei \n" #else " mfc0 $1,$12 \n" @@ -51,7 +51,7 @@ __asm__ ( " .macro local_irq_disable\n" " .set push \n" " .set noat \n" -#if defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2) +#ifdef CONFIG_CPU_MIPSR2 " di \n" #else " mfc0 $1,$12 \n" @@ -91,7 +91,7 @@ __asm__ ( " .set push \n" " .set reorder \n" " .set noat \n" -#if defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2) +#ifdef CONFIG_CPU_MIPSR2 " di \\result \n" #else " mfc0 \\result, $12 \n" @@ -115,8 +115,7 @@ __asm__ ( " .macro local_irq_restore flags \n" " .set noreorder \n" " .set noat \n" -#if (defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2)) && \ - defined(CONFIG_IRQ_CPU) +#if defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU) /* * Slow, but doesn't suffer from a relativly unlikely race * condition we're having since days 1. @@ -125,7 +124,7 @@ __asm__ ( " di \n" " ei \n" "1: \n" -#elif defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS64_R2) +#elif defined(CONFIG_CPU_MIPSR2) /* * Fast, dangerous. Life is fun, life is good. */ diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h index 5c5edbf93707..9f92aed17754 100644 --- a/include/asm-mips/mach-mips/cpu-feature-overrides.h +++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h @@ -14,7 +14,7 @@ /* * CPU feature overrides for MIPS boards */ -#ifdef CONFIG_CPU_MIPS32_R1 +#ifdef CONFIG_CPU_MIPS32 #define cpu_has_tlb 1 #define cpu_has_4kex 1 #define cpu_has_4kcache 1 @@ -40,7 +40,7 @@ #define cpu_icache_snoops_remote_store 1 #endif -#ifdef CONFIG_CPU_MIPS64_R1 +#ifdef CONFIG_CPU_MIPS64 #define cpu_has_tlb 1 #define cpu_has_4kex 1 #define cpu_has_4kcache 1 diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index 0076a537cf0c..ee25a779bf49 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -76,7 +76,7 @@ static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, * These are used to make use of C type-checking.. */ #ifdef CONFIG_64BIT_PHYS_ADDR - #ifdef CONFIG_CPU_MIPS32_R1 + #ifdef CONFIG_CPU_MIPS32 typedef struct { unsigned long pte_low, pte_high; } pte_t; #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) #else |