diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2007-07-09 16:29:16 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-07-10 17:33:05 +0100 |
| commit | 688b3d720820a9e3e2e9d5882be64a28f649e206 (patch) | |
| tree | 7181045ae55f69966e8237439a215242e9714ff4 /include/asm-mips | |
| parent | c99cabf034d42c9e4a9c1ed9dfd26411b2fb9b57 (diff) | |
[MIPS] Delete Ocelot 3 support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
| -rw-r--r-- | include/asm-mips/mach-ocelot3/cpu-feature-overrides.h | 48 | ||||
| -rw-r--r-- | include/asm-mips/war.h | 4 |
2 files changed, 2 insertions, 50 deletions
diff --git a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h deleted file mode 100644 index 57a12ded0613..000000000000 --- a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2004 MontaVista Software Inc. - * Author: Manish Lachwani, mlachwani@mvista.com - * Copyright (C) 2004 Ralf Baechle - */ -#ifndef __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H -#define __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H - -/* - * Momentum Ocelot-3 is based on Rm7900 processor which - * is based on the E9000 core. - */ -#define cpu_has_watch 1 -#define cpu_has_mips16 0 -#define cpu_has_divec 0 -#define cpu_has_vce 0 -#define cpu_has_cache_cdex_p 0 -#define cpu_has_cache_cdex_s 0 -#define cpu_has_prefetch 1 -#define cpu_has_mcheck 0 -#define cpu_has_ejtag 0 - -#define cpu_has_llsc 1 -#define cpu_has_vtag_icache 0 -#define cpu_has_dc_aliases 0 -#define cpu_has_ic_fills_f_dc 0 -#define cpu_has_dsp 0 -#define cpu_icache_snoops_remote_store 0 - -#define cpu_has_nofpuex 0 -#define cpu_has_64bits 1 - -#define cpu_has_inclusive_pcaches 0 - -#define cpu_dcache_line_size() 32 -#define cpu_icache_line_size() 32 -#define cpu_scache_line_size() 32 - -#define cpu_has_mips32r1 0 -#define cpu_has_mips32r2 0 -#define cpu_has_mips64r1 0 -#define cpu_has_mips64r2 0 - -#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h index 45cb82724830..9de52a5b0f3d 100644 --- a/include/asm-mips/war.h +++ b/include/asm-mips/war.h @@ -183,8 +183,8 @@ */ #if defined(CONFIG_BASLER_EXCITE) || defined(CONFIG_MIPS_ATLAS) || \ defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MOMENCO_OCELOT) || \ - defined(CONFIG_MOMENCO_OCELOT_3) || defined(CONFIG_PMC_YOSEMITE) || \ - defined(CONFIG_SGI_IP32) || defined(CONFIG_WR_PPMC) + defined(CONFIG_PMC_YOSEMITE) || defined(CONFIG_SGI_IP32) || \ + defined(CONFIG_WR_PPMC) #define ICACHE_REFILLS_WORKAROUND_WAR 1 #endif |