diff options
| author | Nick Piggin <npiggin@suse.de> | 2008-05-22 00:12:31 +1000 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2008-06-30 22:30:25 +1000 |
| commit | 74f0609526afddd88bef40b651da24f3167b10b2 (patch) | |
| tree | be6d04cbc81d37957f484b4085113765c9903e4c /include/asm-powerpc/system.h | |
| parent | e9a4b6a3f6592862a67837e80aad3f50468857a6 (diff) | |
powerpc: Optimise smp_wmb on 64-bit processors
For 64-bit processors, lwsync is the recommended method of store/store
ordering on caching enabled memory. For those subarchs which have
lwsync, use it rather than eieio for smp_wmb.
Signed-off-by: Nick Piggin <npiggin@suse.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/system.h')
| -rw-r--r-- | include/asm-powerpc/system.h | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h index d1ced5029c42..145b70f6d22b 100644 --- a/include/asm-powerpc/system.h +++ b/include/asm-powerpc/system.h @@ -30,8 +30,8 @@ * * For wmb(), we use sync since wmb is used in drivers to order * stores to system memory with respect to writes to the device. - * However, smp_wmb() can be a lighter-weight eieio barrier on - * SMP since it is only used to order updates to system memory. + * However, smp_wmb() can be a lighter-weight lwsync or eieio barrier + * on SMP since it is only used to order updates to system memory. */ #define mb() __asm__ __volatile__ ("sync" : : : "memory") #define rmb() __asm__ __volatile__ ("sync" : : : "memory") @@ -43,9 +43,16 @@ #ifdef __KERNEL__ #define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */ #ifdef CONFIG_SMP + +#ifdef __SUBARCH_HAS_LWSYNC +# define SMPWMB lwsync +#else +# define SMPWMB eieio +#endif + #define smp_mb() mb() #define smp_rmb() rmb() -#define smp_wmb() eieio() +#define smp_wmb() __asm__ __volatile__ (__stringify(SMPWMB) : : :"memory") #define smp_read_barrier_depends() read_barrier_depends() #else #define smp_mb() barrier() |