diff options
| author | Michael Neuling <mikey@neuling.org> | 2007-12-06 17:24:48 +1100 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2007-12-11 13:45:56 +1100 |
| commit | 584f8b71a2e8abdaeb4b6f4fddaf542b61392453 (patch) | |
| tree | c14f26334e3a3524046f0790f96564a4a4f22d92 /include/asm-powerpc | |
| parent | 44ef339073f67d4abcc62ae52a5fbc069d7a4d29 (diff) | |
[POWERPC] Use SLB size from the device tree
Currently we hardwire the number of SLBs to 64, but PAPR says we
should use the ibm,slb-size property to obtain the number of SLB
entries. This uses this property instead of assuming 64. If no
property is found, we assume 64 entries as before.
This soft patches the SLB handler, so it shouldn't change performance
at all.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc')
| -rw-r--r-- | include/asm-powerpc/mmu-hash64.h | 1 | ||||
| -rw-r--r-- | include/asm-powerpc/reg.h | 6 |
2 files changed, 1 insertions, 6 deletions
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h index 82328dec2b52..12e5e773c67e 100644 --- a/include/asm-powerpc/mmu-hash64.h +++ b/include/asm-powerpc/mmu-hash64.h @@ -180,6 +180,7 @@ extern int mmu_vmalloc_psize; extern int mmu_io_psize; extern int mmu_kernel_ssize; extern int mmu_highuser_ssize; +extern u16 mmu_slb_size; /* * If the processor supports 64k normal pages but not 64k cache diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h index e775ff1ca413..1f685047c6ff 100644 --- a/include/asm-powerpc/reg.h +++ b/include/asm-powerpc/reg.h @@ -691,12 +691,6 @@ #define PV_BE 0x0070 #define PV_PA6T 0x0090 -/* - * Number of entries in the SLB. If this ever changes we should handle - * it with a use a cpu feature fixup. - */ -#define SLB_NUM_ENTRIES 64 - /* Macros for setting and retrieving special purpose registers */ #ifndef __ASSEMBLY__ #define mfmsr() ({unsigned long rval; \ |