diff options
| author | Kumar Gala <galak@freescale.com> | 2005-09-22 10:13:31 -0500 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2005-09-25 22:38:45 +1000 |
| commit | 3efc333e7fdb6fab9d4eae129e2b249c6483b250 (patch) | |
| tree | fd83ddc78cc484a767edf69731ab3525a625dbb8 /include/asm-ppc/spinlock.h | |
| parent | b671ad2befe37131af380183760862d5cbad858d (diff) | |
[PATCH] powerpc: Fix building of power3 config on ppc32
The spinlock_types.h merge renamed the structure for raw_spinlock_t to
match ppc64. In doing so some of the spinlock macros/functions needed to
be updated to match. Apparently, this seems to only be caught when
building power3.
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-ppc/spinlock.h')
| -rw-r--r-- | include/asm-ppc/spinlock.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/asm-ppc/spinlock.h b/include/asm-ppc/spinlock.h index 20edcf2a6e0c..5c64b75f0295 100644 --- a/include/asm-ppc/spinlock.h +++ b/include/asm-ppc/spinlock.h @@ -9,7 +9,7 @@ * (the type definitions are in asm/raw_spinlock_types.h) */ -#define __raw_spin_is_locked(x) ((x)->lock != 0) +#define __raw_spin_is_locked(x) ((x)->slock != 0) #define __raw_spin_unlock_wait(lock) \ do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) @@ -31,17 +31,17 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock) bne- 2b\n\ isync" : "=&r"(tmp) - : "r"(&lock->lock), "r"(1) + : "r"(&lock->slock), "r"(1) : "cr0", "memory"); } static inline void __raw_spin_unlock(raw_spinlock_t *lock) { __asm__ __volatile__("eieio # __raw_spin_unlock": : :"memory"); - lock->lock = 0; + lock->slock = 0; } -#define __raw_spin_trylock(l) (!test_and_set_bit(0,&(l)->lock)) +#define __raw_spin_trylock(l) (!test_and_set_bit(0,(volatile unsigned long *)(&(l)->slock))) /* * Read-write spinlocks, allowing multiple readers |