diff options
| author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 |
| commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
| tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-sh/cpu-sh4/timer.h | |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-sh/cpu-sh4/timer.h')
| -rw-r--r-- | include/asm-sh/cpu-sh4/timer.h | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/include/asm-sh/cpu-sh4/timer.h b/include/asm-sh/cpu-sh4/timer.h new file mode 100644 index 000000000000..8a4af126c890 --- /dev/null +++ b/include/asm-sh/cpu-sh4/timer.h @@ -0,0 +1,51 @@ +/* + * include/asm-sh/cpu-sh4/timer.h + * + * Copyright (C) 2004 Lineo Solutions, Inc. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH4_TIMER_H +#define __ASM_CPU_SH4_TIMER_H + +/* + * --------------------------------------------------------------------------- + * TMU Common definitions for SH4 processors + * SH7750S/SH7750R + * SH7751/SH7751R + * SH7760 + * --------------------------------------------------------------------------- + */ + +#if !defined(CONFIG_CPU_SUBTYPE_SH7760) +#define TMU_TOCR 0xffd80000 /* Byte access */ +#endif +#define TMU_TSTR 0xffd80004 /* Byte access */ + +#define TMU0_TCOR 0xffd80008 /* Long access */ +#define TMU0_TCNT 0xffd8000c /* Long access */ +#define TMU0_TCR 0xffd80010 /* Word access */ + +#define TMU1_TCOR 0xffd80014 /* Long access */ +#define TMU1_TCNT 0xffd80018 /* Long access */ +#define TMU1_TCR 0xffd8001c /* Word access */ + +#define TMU2_TCOR 0xffd80020 /* Long access */ +#define TMU2_TCNT 0xffd80024 /* Long access */ +#define TMU2_TCR 0xffd80028 /* Word access */ +#define TMU2_TCPR 0xffd8002c /* Long access */ + +#if !defined(CONFIG_CPU_SUBTYPE_SH7760) +#define TMU3_TCOR 0xfe100008 /* Long access */ +#define TMU3_TCNT 0xfe10000c /* Long access */ +#define TMU3_TCR 0xfe100010 /* Word access */ + +#define TMU4_TCOR 0xfe100014 /* Long access */ +#define TMU4_TCNT 0xfe100018 /* Long access */ +#define TMU4_TCR 0xfe10001c /* Word access */ +#endif + +#endif /* __ASM_CPU_SH4_TIMER_H */ + |