diff options
| author | David S. Miller <davem@sunset.davemloft.net> | 2007-10-12 02:59:40 -0700 |
|---|---|---|
| committer | David S. Miller <davem@sunset.davemloft.net> | 2007-10-13 21:53:15 -0700 |
| commit | a650d3839e7a68321e5b76264398a63019b0928b (patch) | |
| tree | e0500c57687c57bc22d0100b74485033a5738dbf /include/asm-sparc64/cpudata.h | |
| parent | d060db63fd38a8a75f666576ef9999c28cdc31cf (diff) | |
[SPARC64]: Make IVEC pointers 64-bit.
Currently we chain IVEC entries using 32-bit "pointers"
because we know that the ivector_table is in the main
kernel image, thus below 4GB.
This uses proper 64-bit pointers instead.
Whilst this bloats up the kernel image size, this sets
the infrastructure necessary to significantly shrink the
kernel size by using physical addresses and dynamically
allocating the ivector table.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/asm-sparc64/cpudata.h')
| -rw-r--r-- | include/asm-sparc64/cpudata.h | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h index 98a6e609163e..379c219c3b7a 100644 --- a/include/asm-sparc64/cpudata.h +++ b/include/asm-sparc64/cpudata.h @@ -75,12 +75,11 @@ struct trap_per_cpu { unsigned long tsb_huge_temp; /* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size. */ - unsigned int irq_worklist; + unsigned long irq_worklist; unsigned int cpu_mondo_qmask; unsigned int dev_mondo_qmask; unsigned int resum_qmask; unsigned int nonresum_qmask; - unsigned int __pad2[1]; void *hdesc; } __attribute__((aligned(64))); extern struct trap_per_cpu trap_block[NR_CPUS]; @@ -129,10 +128,10 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, #define TRAP_PER_CPU_TSB_HUGE 0xd0 #define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8 #define TRAP_PER_CPU_IRQ_WORKLIST 0xe0 -#define TRAP_PER_CPU_CPU_MONDO_QMASK 0xe4 -#define TRAP_PER_CPU_DEV_MONDO_QMASK 0xe8 -#define TRAP_PER_CPU_RESUM_QMASK 0xec -#define TRAP_PER_CPU_NONRESUM_QMASK 0xf0 +#define TRAP_PER_CPU_CPU_MONDO_QMASK 0xe8 +#define TRAP_PER_CPU_DEV_MONDO_QMASK 0xec +#define TRAP_PER_CPU_RESUM_QMASK 0xf0 +#define TRAP_PER_CPU_NONRESUM_QMASK 0xf4 #define TRAP_BLOCK_SZ_SHIFT 8 |